WM8750JL
Production Data
MONO MIXING
The stereo ADC can operate as a stereo or mono device, or the two channels can be mixed to mono
in the analogue domain (i.e. before the ADC). MONOMIX selects the mode of operation; either the left
or right channel ADC can be used, allowing the unused ADC to be powered off or used for a DC
measurement conversion. The user also has the flexibility to select the data output from the audio
interface using DATSEL. The default is for left and right channel ADC data to be output, but the
interface may also be configured so that e.g. left channel ADC data is output as both left and right
data for when mono mixing is selected.
Note:
If DC measurement is selected this overrides the MONOMIX selection.
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R31 (1Fh)
MONOMIX
[1:0]
00
00: Stereo
7:6
ADC input
Mode
01: Analogue Mono Mix (using left ADC)
10: Analogue Mono Mix (using right ADC)
11: Reserved
Table 6 Mono Mixing
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R23 (17h)
DATSEL
[1:0]
00
00: left data=left ADC; right data =right ADC
01: left data =left ADC; right data = left ADC
10: left data = right ADC; right data =right ADC
11: left data = right ADC; right data = left ADC
3:2
Additional
Control (1)
Table 7 ADC Data Output Configuration
The MICBIAS output provides a low noise reference voltage suitable for biasing electret type
microphones and the associated external resistor biasing network. Refer to the Applications
Information section for recommended external components. The output can be enabled or disables
using the MICB control bit (see also the “Power Management” section).
REGISTER
ADDRESS
BIT
LABEL DEFAULT
MICB
DESCRIPTION
R25 (19h)
1
0
Microphone Bias Enable
Power
Management (1)
0 = OFF (high impedance output)
1 = ON
Table 8 Microphone Bias Control
The internal MICBIAS circuitry is shown below. Note that the is a maximum source current capability
for MICBIAS is 3mA. The external biasing resistors therefore must be large enough to limit the
MICBIAS current to 3mA.
VMID
MICB
MICBIAS
= 1.8 x VMID
= 0.9 X AVDD
internal
resistor
internal
resistor
AGND
Figure 8 Microphone Bias Schematic
PD, April 2012, Rev 4.1
18
w
WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
