WM8746
Production Data
SOFTWARE CONTROL MODES
DIGITAL AUDIO INTERFACE CONTROL REGISTERS
Interface format is selected via the FMT[1:0] register bits:
REGISTER ADDRESS
0000011
BIT
LABEL
DEFAULT
DESCRIPTION
1:0 FMT[1:0]
00
Interface format Select
00 : right justified mode
01: left justified mode
10: I2S mode
Interface Control
11: DSP mode A or B
In left justified, right justified or I2S modes, the LRP register bit controls the polarity of LRCIN. If this
bit is set high, the expected polarity of LRCIN will be the opposite of that shown Figure 4, Figure 5
and Figure 6. Note that if this feature is used as a means of swapping the left and right channels, a 1
sample phase difference will be introduced.
REGISTER ADDRESS
0000011
BIT
LABEL
DEFAULT
DESCRIPTION
LRCIN Polarity
2
LRP
0
Interface Control
0 : normal LRCIN polarity
1: inverted LRCIN polarity
In DSP modes, the LRCIN register bit is used to select between early and late modes:
REGISTER ADDRESS
0000011
BIT
LABEL
DEFAULT
DESCRIPTION
DSP Format
2
LRP
0
Interface Control
0: Mode A
1: Mode B
By default, LRCIN and DIN0/1/2 are sampled on the rising edge of BCKIN and should ideally change
on the falling edge. Data sources which change LRCIN and DIN0/1/2 on the rising edge of BCKIN
can be supported by setting the BCP register bit. Setting BCP to 1 inverts the polarity of BCKIN to
the inverse of that shown in Figure 4, Figure 5, Figure 6, Figure 7 and Figure 8.
REGISTER ADDRESS
0000011
BIT
LABEL
DEFAULT
DESCRIPTION
BCKIN Polarity
3
BCP
0
Interface Control
0 : normal BCKIN polarity
1: inverted BCKIN polarity
The IWL[1:0] bits are used to control the input word length.
REGISTER ADDRESS
0000011
BIT
LABEL
DEFAULT
DESCRIPTION
Input Word Length
00 : 16 bit data
5:4
IWL[1:0]
10
Interface Control
01: 20 bit data
10: 24 bit data
11: 32 bit data
Note: If 32-bit mode is selected in right justified mode, the WM8746 defaults to 24 bits.
In all modes, the data is signed 2's complement. The digital filters always input 24-bit data. If the
DAC is programmed to receive 16 or 20 bit data, the WM8746 pads the unused LSBs with zeros. If
the DAC is programmed into 32 bit mode, the 8 LSBs are ignored.
The PHASE bits control the orientation of the data output of the three stereo channels. By default all
the channels are non-inverting.
REGISTER ADDRESS
0000011
BIT
LABEL
DEFAULT
DESCRIPTION
Output phase direction
8:6
PHASE
000
Interface Control
1 in bit 6 reverses OUT0L/R.
1 in bit 7 reverses OUT1L/R.
1 in bit 8 reverses OUT2L/R.
March 2006, PD Rev 4.0
15
w
WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
