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WM8716SEDS 参数 Datasheet PDF下载

WM8716SEDS图片预览
型号: WM8716SEDS
PDF下载: 下载PDF文件 查看货源
内容描述: 高性能24位, 192kHz的立体声DAC [High Performance 24-bit, 192kHz Stereo DAC]
分类和应用: 转换器光电二极管
文件页数/大小: 27 页 / 301 K
品牌: WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
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Production Data  
WM8716  
SOFT MUTE  
MUT  
(REG2, B0)  
L
Soft Mute off (normal operation)  
Soft Mute on (no output)  
H
Table 8 Soft Mute  
Setting MUT causes the attenuation to ramp from the current value down to 00. The values held in  
the attenuation registers are unchanged. When MUT is reset the attenuation will ramp back up to the  
previous value. The ramp rate is 128/fs s/0.5dB step.  
DIGITAL DE-EMPHASIS  
DEM  
(REG2, B1)  
L
De-emphasis off  
De-emphasis on  
H
Table 9 Digital De-Emphasis  
DAC OPERATION ENABLE  
OPE  
(REG2,B2)  
L
Normal operation  
H
DAC output forced to bipolar zero,  
irrespective of input data.  
Table 10 DAC Operation Enable  
AUDIO DATA INPUT FORMAT  
I2S  
IW1  
IW0  
AUDIO INTERFACE  
(REG3, B0)  
(REG2, B4)  
(REG2, B3)  
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
16-bit standard right justified  
20-bit standard right justified  
24-bit standard right justified  
24-bit left justified (MSB first)  
16-bit I2S  
24-bit I2S  
20-bit I2S  
20-bit left justified (MSB first)  
Table 11 Audio Data Input Format  
POLARITY OF LR INPUT CLOCK  
The left channel data for a particular sample instant is always input first, then the right channel data.  
LRP  
(REG3, B1)  
L
LR High – left channel  
LR Low – right channel  
LR Low – left channel  
LR High – right channel  
H
Table 12 Polarity of LR Input Clock  
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PD Rev 4.1September 2006  
15  
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