Production Data
WM8716
8 X FS INPUT SAMPLE RATE
Due to the higher speed of the interface in 8 x fs mode, audio data is input on two pins. The MODE
pin (pin 24) is used as the second input for the right channel data and left data is input on DIN (pin 2).
In this mode, software control of the device is not available. The data can be input in two formats, left
or right justified, selectable by ML/I2S and two word lengths (20 or 24 bit), selectable by CSBIWO. In
both modes the data is always clocked in MSB first.
For left justified data the word start is marked by the falling edge of LRCIN. The data is clocked in on
the next 20/24 BCKIN rising edges. This format is compatible with devices such as the PMD100.
For right justified the data is justified to the rising edge of LRCIN and the data is clocked in on the
preceding 20/24 BCKIN rising edges before the LRCIN rising edge. This format is compatible with
devices such as the DF1704 or SM5842.
In both modes the polarity of LRCIN can be switched using MD/DM0.
Differential hardware mode can be used in conjunction with 8fs mode by setting the DIFFHW
pin high. In differential 8fs mode the data is input on DIN and output differentially. MODE is unused
and must be tied low.
1/8fs
LRCIN (PIN 1)
BCKIN (PIN 3)
LEFT AUDIO
B23
B23
B22 B21 B20
B19
B19
B2
B2
B1
B1
B0
B0
B23 B22
B23 B22
B21
B21
B20
B20
DATA DIN
(PIN 2)
RIGHT AUDIO
DATA MODE
(PIN 24)
B22 B21 B20
1/8fs
LRCIN (PIN 1)
BCKIN (PIN 3)
LEFT AUDIO
DATA DIN
(PIN 2)
B23
B23
B22 B21 B20
B19
B19
B2
B2
B1
B1
B0
B0
RIGHT AUDIO
DATA MODE
(PIN 24)
B22 B21 B20
Figure 5 Audio Data Input Format (8 x fs Operation)
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PD Rev 4.1September 2006
11
WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
