Product Preview
WM8591
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
De-emphasis Mode Select:
R9 (09h)
0001001
0
DEEMPH
0
0 : Normal mode
DAC Control
1: De-emphasis mode
2:1
DZFM
00
DZFM
ZFLAG1
Disabled
ZFLAG2
00
01
10
11
Disabled
Left channels zero
Both channels zero
Either channel zero
Right channels zero
Both channels zero
Either channel zero
3
4
DMUTE
0
0
DAC Channel Soft Mute Enables:
0: Mute disabled
1: Mute enabled
ZFLAGPOL
ZFLAG polarity
ZFLAGPOL
ZFLAGL
ZFLAGR
Pin pulls low to indicate zero condition, high
impedance otherwise
0
Pin is high impedance when zero condition
detected, pulls low otherwise
1
R10 (0Ah)
0001010
1:0
DACFMT[1:0]
DACLRP
01
0
DAC Interface Format Select:
00: Right justified mode
01: Left justified mode
DAC Interface
Control
10: I2S mode
11: DSP mode
2
DACLRC Polarity or DSP Early/Late Mode Select
Left Justified / Right Justified /
I2S:
DSP Mode:
0: Early Mode
1: Late Mode
0: Standard DACLRC Polarity
1: Inverted DACLRC Polarity
DAC BITCLK Polarity:
3
DACBCP
0
0: Normal – DIN and DACLRC sampled on rising edge of
DACBCLK
1: Inverted - DIN and DACLRC sampled on falling edge of
DACBCLK
5:4
DACWL[1:0]
10
DAC Input Word Length:
00: 16-bit Mode
01: 20-bit Mode
10: 24-bit Mode
11: 32-bit Mode (not supported in right justified mode)
8
DACOSR
0
DAC Oversample Rate Select:
0: 128x oversampling
1: 64x oversapmling
R11 (0Bh)
0001011
1:0
ADCFMT[1:0]
01
ADC Interface Format Select:
00: Right justified mode
01: Left justified mode
ADC Interface
Control
10: I2S mode
11: DSP mode
2
ADCLRP
0
ADCLRC Polarity or DSP Early/Late Mode Select
Left Justified / Right Justified /
I2S:
DSP Mode:
0: Early mode
0: Standard ADCLRC polarity
1: Inverted ADCLRC polarity
1: Late mode
PP Rev 1.0 May 2005
39
w
WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
