Production Data
WM8580
The audio data sample can be transferred to either the AIF or the SPDIF Tx.
When the audio data sample is transferred to the AIF, and if the AIF is operating in a mode which
has less data bits, then the WM8580 will reduce the audio data sample to the length of the AIF. For
example, if the AIF is operating in 16 bit mode, but the SPDIF Rx receives an audio data sample
length of 21 bits, then the WM8580 will reduce the 21 bits to 16 bits by removing the LSBs. This
cannot be masked. If the AIF is operating in 24 bit mode, then the full 21 bits are transferred on the
AIF, with the LSBs set to 000.
When the audio data sample is transferred to the SPDIF TX, then the full audio data sample (24 bits)
is written to the SPDIF Tx. Unless it has been truncated using the WL-MASK bits
Should the recovered DEEMPH channel status be set, and the S/PDIF receiver is routed to DAC1,
the de-emphasis filter is activated for DAC1.
The S/PDIF receiver reads channel status data from channel 1 only. The channel status data is
stored in five read-only registers, which can be read via the serial interface (see Serial Interface
Readback). When new channel status data has been recovered, and stored in registers, the Channel
Status Update (CSUD) bit is set to indicate that the status registers have updated and are ready for
readback. After readback, CSUD are cleared until the registers are next updated. The CSUD flag
can be configured to be output on any of the GPO pins. The register descriptions for the channel
status bits are given below.
REGISTER
ADDRESS
BIT
LABEL
CHANNEL
STATUS
BIT
DEFAULT
DESCRIPTION
R44
SPDRXCHAN 1
2Ch
0
CON/PRO
0
-
0 = Consumer Mode
1 = Professional Mode
The WM8580 is a consumer mode device.
Detection of professional mode may give
erroneous behaviour.
(read-only)
1
AUDIO_N
1
-
Linear PCM Identification
0 = Data word represents audio PCM
samples.
1 = Data word does not represent audio
PCM samples.
2
3
CPY_N
2
3
-
-
0 = Copyright is asserted for this data.
1 = Copyright is not asserted for this data.
DEEMPH
0 = Recovered S/PDIF data has no pre-
emphasis.
1 = Recovered S/PDIF data has pre-
emphasis.
5:4
7:6
Reserved
CHSTMODE
[1:0]
5:4
7:6
-
-
Reserved for additional de-emphasis modes.
00 = Only valid mode for consumer
applications.
Table 56 S/PDIF Receiver Channel Status Register 1
REGISTER
ADDRESS
BIT
LABEL
CHANNEL
STATUS
BIT
DEFAULT
DESCRIPTION
R45
SPDRXCHAN 2
2Dh
7:0
CATCODE
[7:0]
15:8
-
Category Code. Refer to S/PDIF
specification IEC60958-3 for details.
00h indicates “general” mode.
(read-only)
Table 57 S/PDIF Receiver Channel Status Register 2
PD Rev 4.3 August 2007
61
w
WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
