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WM8580_07_12 参数 Datasheet PDF下载

WM8580_07_12图片预览
型号: WM8580_07_12
PDF下载: 下载PDF文件 查看货源
内容描述: 多通道编解码器S / PDIF收发器 [Multichannel CODEC with S/PDIF Transceiver]
分类和应用: 解码器编解码器光电二极管
文件页数/大小: 97 页 / 1142 K
品牌: WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
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WM8580  
Production Data  
REGISTER  
ADDRESS  
BIT  
LABEL  
DEFAULT  
DESCRIPTION  
R36  
SPDMODE  
24h  
0
SPDIFIN1MODE  
1
Selects the input circuit type for the SPDIFIN1 input  
0 = CMOS-compatible input  
1 = Comparator input. Compatible with 500mVpp AC  
coupled consumer S/PDIF input signals as defined in  
IEC60958-3.  
2:1  
RXINSEL[1:0]  
00  
S/PDIF Receiver input mux select.  
The general purpose inputs must be configured using  
GPOxOP to be either CMOS or comparator inputs if  
selected by RXINSEL.  
00 = Select SPDIFIN1  
01 = Select SPDIFIN2 (MFP3)  
10 = Select SPDIFIN3 (MFP4)  
11 = Select SPDIFIN4 (MFP5)  
S/PDIF Receiver Word Length Truncation Mask  
6
WL_MASK  
0
0 = disabled, data word is truncated as described in  
Table 60.  
1 = enabled, data word is not truncated.  
GPO pin Configuration Select.  
R39  
GPO2  
26h  
3:0  
7:4  
GPO3OP[3:0]  
GPO4OP[3:0]  
0010  
0011  
1110 = Set GPO as S/PDIF input (CMOS-compatible  
input).  
1111 = Set GPO as S/PDIF input (compatible with  
500mVpp AC coupled consumer S/PDIF input signals  
as defined in IEC-60958-3).  
R40  
3:0  
GPO5OP[3:0]  
0100  
GPO3  
27h  
For GPO defaults, see Table 66.  
S/PDIF Receiver powerdown.  
0 = S/PDIF Receiver enabled  
1 = S/PDIF Receiver disabled  
R51  
PWRDN 2  
33h  
5
SPDIFRXD  
1
Table 55 S/PDIF Receiver Input Selection Register  
AUDIO DATA HANDLING  
The S/PDIF receiver recovers the data and VUCP bits from each sub-frame. If the S/PDIF input data  
is in a non-compressed audio format the data can be internally routed to the stereo data input of  
DAC1. The WM8580 can detect when the data is in a non-compressed audio format and will  
automatically mute the DAC. See Non-Audio Detection section for more detail.  
The received data can also be output over the digital audio interfaces in any of the data formats  
supported. This can be performed while simultaneously using DAC1 for playback. The received data  
may also be re-transmitted via the S/PDIF transmitter.  
USER DATA  
The WM8580 can output recovered user data received using GPO pins. See Table 66 for General  
Purpose Pin control information.  
CHANNEL STATUS DATA  
The channel status bits are recovered from the incoming data stream and are used to control various  
functions of the device.  
The S/PDIFRx interface always receives 24 bits of data in bits 4 to 27 of the SPDIF payload. The  
audio sample can be either 20 bits if AUX bits not used or up to 24bits if AUX bits used (refer to  
Figure 33). So the audio sample can be 20,21,22,23 or 24 bit. The source (wherever the S/PDIF data  
is coming from) of the S/PDIF data stream must set the MAXWL and RXWL within the status bits to  
indicate the size of the audio sample. This is then recovered by the S/PDIF Rx interface. The S/PDIF  
Rx interface ALWAYS receives 24 bits, but if the actual length of the audio data sample (indicated by  
MAXWL and RXWL) is less than 24 bits, then the user has the option to truncate these 24 bits to the  
actual size. These truncated bits are then sent to either the SPDIF Tx or the AIF. Truncation may  
allow users to process data faster. If the user does not want this truncation to happen then they must  
mask the truncation using the WL_MASK. In this case all 24 bits of data received are transferred.  
PD Rev 4.3 August 2007  
60  
w
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