WM8580
Production Data
CONTROL INTERFACE TIMING – 2-WIRE MODE
t3
t3
t5
SDIN
t
t4
t 8
t2
6
SCLK
t 7
t 9
t1
Figure 5 Control Interface Timing – 2-Wire Serial Control Mode
Test Conditions
AVDD, PVDD = 5V,DVDD = 3.3V, AGND, PGND,DGND = 0V, TA = +25oC, fs = 48kHz, MCLK and ADCMCLK = 256fs unless
otherwise stated
PARAMETER
SYMBOL
MIN
TYP
MAX
UNIT
Program Register Input Information
SCLK Frequency
0
526
kHz
us
ns
ns
ns
ns
ns
ns
ns
ns
ns
SCLK Low Pulse-Width
SCLK High Pulse-Width
Hold Time (Start Condition)
Setup Time (Start Condition)
Data Setup Time
t1
t2
t3
t4
t5
t6
t7
t8
t9
tps
1.3
600
600
600
100
SDIN, SCLK Rise Time
SDIN, SCLK Fall Time
Setup Time (Stop Condition)
Data Hold Time
300
300
600
0
900
5
SCLK glitch suppression
Table 7 2-Wire Control Interface Timing Information
PD Rev 4.3 August 2007
16
w
WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
