Production Data
WM8352
SYSCLK
ADC / DAC SAMPLE
RATE DIVIDER
CLOCKING MODE
ADC / DAC
SAMPLE RATE
48 kHz
000 = SYSCLK / 1
001 = SYSCLK / 1.5
010 = SYSCLK / 2
011 = SYSCLK / 3
100 = SYSCLK / 4
101 = SYSCLK / 5.5
110 = SYSCLK / 6
111 = Reserved
32 kHz
24 kHz
Normal
16 kHz
12.2880 MHz
12 kHz
(256 * Fs)
Not used
8 kHz
Reserved
44.1 kHz
Not used
22.05 kHz
Not used
11.025 kHz
8.018 kHz
Not used
Reserved
44.118 kHz
Not used
22.059 kHz
Not used
11.029 kHz
8.021 kHz
Not used
Reserved
8 kHz
000 = SYSCLK / 1
001 = SYSCLK / 1.5
010 = SYSCLK / 2
011 = SYSCLK / 3
100 = SYSCLK / 4
101 = SYSCLK / 5.5
110 = SYSCLK / 6
111 = Reserved
Normal
11.2896 MHz
12.0000 MHz
2.0480 MHz
(256 * Fs)
000 = SYSCLK / 1
001 = SYSCLK / 1.5
010 = SYSCLK / 2
011 = SYSCLK / 3
100 = SYSCLK / 4
101 = SYSCLK / 5.5
110 = SYSCLK / 6
111 = Reserved
USB
(272 * Fs)
000 = SYSCLK / 1
001 = SYSCLK / 1.5
010 = SYSCLK / 2
011 = SYSCLK / 3
100 = SYSCLK / 4
101 = SYSCLK / 5.5
110 = SYSCLK / 6
111 = Reserved
Not used
Not used
Not used
Not used
Not used
Not used
Reserved
Normal
(256 * Fs)
Table 10 Derivation of Sample Rates in Normal / USB Modes
Note that, in USB mode, the ADC / DAC sample rates do not match exactly with the commonly used
sample rates (eg. 44.118 kHz instead of 44.100 kHz). At most, the difference is less than 0.5%,
which is within normal accepted tolerances. Data recorded at 44.100 kHz sample rate and replayed
at 44.118 kHz will experience a slight (sub 0.5%) pitch shift as a result of this difference.
Note: USB mode cannot be used to generate a 48kHz samples rate from a 12MHz MCLK; the FLL
should be used in this case.
The user must ensure correct synchronisation of data across the digital interfaces. This is particularly
important when different sample rates are used, as described above.
PD, February 2011, Rev 4.4
51
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WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
