WM8352
Production Data
REFER TO
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
13
CS2_DRIVE
0
Enables the current sink ISINKB
LED mode-
0 = disable LED
1 = enabled LED
FLASH mode-
Register bit used to trigger the flash, if
CS2_TRIGSRC is set to 0. Flash is started when
the bit goes high, it is then reset at the end of the
flash duration. Duration is determined by
CS2_FLASH_DUR. This bit has no effect if
CS2_TRIGSRC is set to 1.
Reset by state machine. Default held in metal
mask.
12
CS2_FLASH_RATE
0
Determines the Flash rate
0 = Normal Operation. Once per trigger (Either
register bit or GPIO)
1 = Flash will be internally triggered every 4
seconds
Reset by state machine.
Sets duration of flash
00 = 32ms
9:8
CS2_FLASH_DUR[1:0]
00
01 = 64ms
10 = 96ms
11 = 1024ms
Reset by state machine.
Switch-off ramp duration
5:4
CS2_OFF_RAMP[1:0]
00
LED mode-
00 = instant (no ramp)
01 = 0.25s
10 = 0.5s
11 = 1s
Flash mode-
00 = instant (no ramp)
01 = 1.95ms
10 = 3.91ms
11 = 7.8ms
Reset by state machine.
Switch-on ramp duration
1:0
CS2_ON_RAMP[1:0]
00
LED mode-
00 = instant (no ramp)
01 = 0.25s
10 = 0.5s
11 = 1s
Flash mode-
00 = instant (no ramp)
01 = 1.95ms
10 = 3.91ms
11 = 7.8ms
Reset by state machine.
Register AFh CSB Flash control
PD, February 2011, Rev 4.4
290
w
WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
