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WM8352 参数 Datasheet PDF下载

WM8352图片预览
型号: WM8352
PDF下载: 下载PDF文件 查看货源
内容描述: 欧胜音频Plusa ? ¢立体声CODEC与电源管理 [Wolfson AudioPlus™ Stereo CODEC with Power Management]
分类和应用:
文件页数/大小: 336 页 / 2353 K
品牌: WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
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WM8352  
Production Data  
REFER TO  
REGISTER  
ADDRESS  
BIT  
LABEL  
DEFAULT  
DESCRIPTION  
9
GP9_INTMODE  
0
GPIO9 Pin Mode  
0 = GPIO interrupt is rising edge triggered, and is  
taken after the effect of the GP9_CFG register bit.  
1 = GPIO interrupt is both rising and falling edge  
triggered.  
Reset by state machine.  
8
7
6
5
4
3
2
1
GP8_INTMODE  
GP7_INTMODE  
GP6_INTMODE  
GP5_INTMODE  
GP4_INTMODE  
GP3_INTMODE  
GP2_INTMODE  
GP1_INTMODE  
0
0
0
0
0
0
0
0
GPIO8 Pin Mode  
0 = GPIO interrupt is rising edge triggered, and is  
taken after the effect of the GP8_CFG register bit.  
1 = GPIO interrupt is both rising and falling edge  
triggered.  
Reset by state machine.  
GPIO7 Pin Mode  
0 = GPIO interrupt is rising edge triggered, and is  
taken after the effect of the GP7_CFG register bit.  
1 = GPIO interrupt is both rising and falling edge  
triggered.  
Reset by state machine.  
GPIO6 Pin Mode  
0 = GPIO interrupt is rising edge triggered, and is  
taken after the effect of the GP6_CFG register bit.  
1 = GPIO interrupt is both rising and falling edge  
triggered.  
Reset by state machine.  
GPIO5 Pin Mode  
0 = GPIO interrupt is rising edge triggered, and is  
taken after the effect of the GP5_CFG register bit.  
1 = GPIO interrupt is both rising and falling edge  
triggered.  
Reset by state machine.  
GPIO4 Pin Mode  
0 = GPIO interrupt is rising edge triggered, and is  
taken after the effect of the GP4_CFG register bit.  
1 = GPIO interrupt is both rising and falling edge  
triggered.  
Reset by state machine.  
GPIO3 Pin Mode  
0 = GPIO interrupt is rising edge triggered, and is  
taken after the effect of the GP3_CFG register bit.  
1 = GPIO interrupt is both rising and falling edge  
triggered.  
Reset by state machine.  
GPIO2 Pin Mode  
0 = GPIO interrupt is rising edge triggered, and is  
taken after the effect of the GP2_CFG register bit.  
1 = GPIO interrupt is both rising and falling edge  
triggered.  
Reset by state machine.  
GPIO1 Pin Mode  
0 = GPIO interrupt is rising edge triggered, and is  
taken after the effect of the GP1_CFG register bit.  
1 = GPIO interrupt is both rising and falling edge  
triggered.  
Reset by state machine.  
PD, February 2011, Rev 4.4  
268  
w
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