WM8321
Production Data
REFER TO
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
CLKOUT output enable
R16528
(4090h)
Clock
CLKOUT_ENA
15
0
0 = Disabled
1 = Enabled
Control 1
Protected by security key.
CLKOUT pin configuration
0 = CMOS
CLKOUT_OD
13
0
1 = Open Drain
CLKOUT_SLO
T [2:0]
CLKOUT output enable ON slot select
000 = Do not enable
10:8
000
001 = Enable in Timeslot 1
010 = Enable in Timeslot 2
011 = Enable in Timeslot 3
100 = Enable in Timeslot 4
101 = Enable in Timeslot 5
110 = Do not enable
111 = Do not enable
6:4
CLKOUT_SLP
SLOT [2:0]
000
CLKOUT output SLEEP slot select
000 = Controlled by CLKOUT_ENA
001 = Disable in Timeslot 5
010 = Disable in Timeslot 4
011 = Disable in Timeslot 3
100 = Disable in Timeslot 2
101 = Disable in Timeslot 1
110 = Controlled by CLKOUT_ENA
111 = Controlled by CLKOUT_ENA
Register 4090h Clock Control 1
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
REFER TO
R16529
(4091h)
Clock
XTAL_INH
Crystal Start-Up Inhibit
0 = Disabled
15
0
1 = Enabled
Control 2
When XTAL_INH=0, the internal RC oscillator will
provide CLKOUT until the crystal oscillator is valid.
When XTAL_INH=1, the ‘ON’ transition is inhibited until
the crystal oscillator is valid.
XTAL_ENA
Crystal Oscillator Enable
13
0
0 = Disabled at all times
1 = Enabled in OFF, ON, SLEEP states
(Note that the BACKUP behaviour is determined by
XTAL_BKUPENA.)
This field can only be written to by loading configuration
settings from OTP/ICE. In all other cases, this field is
Read Only.
XTAL_BKUPE
NA
Selects the RTC and 32.768kHz oscillator in BACKUP
state
12
1
0 = RTC unclocked in BACKUP
1 = RTC maintained in BACKUP
(Note that XTAL_ENA must also be set if the RTC is to
be maintained in BACKUP)
Register 4091h Clock Control 2
PD, February 2012, Rev 4.0
224
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