WM8200
Product Preview
ELECTRICAL CHARACTERISTICS
Test Conditions:
AVDD = DVDD = 3.0V, fCLK = 40MHz, 50% duty cycle, MODE = AVDD, VREF=1.0V (REFT = 2.0V, REFB = 1.0V),
PGA gain = 1.0, TA = TMIN to TMAX, unless otherwise stated.
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNIT
DC Accuracy
Integral nonlinearity
Differential nonlinearity
Offset error
INL
±1.0
±0.3
0.7
LSB
LSB
DNL
% of FSR
% of FSR
Full scale error
2.2
Missing codes
No missing codes guaranteed
Analogue Input Signal to AIN pins
Differential analogue input
voltage (AINP-AINN)
PGA=1x gain
-1
5
1
V
Switched input capacitance
Conversion Characteristics
Conversion frequency
1.2
pF
fCLK
40
MHz
cycles of
CLK
Pipeline delay
4
Dynamic Performance (differential input mode)
fIN = 4.8MHz
IN = 20MHz
fIN = 4.8MHz
IN = 20MHz
fIN = 4.8MHz
IN = 20MHz
fIN = 4.8MHz
IN = 20MHz
fIN = 4.8MHz
IN = 20MHz
9.6
9.5
Effective number of bits
Spurious free dynamic range
Total harmonic distortion
Signal to noise ratio
ENOB
SFDR
THD
bits
dB
dB
dB
dB
f
72
f
70
-72.5
-71.6
60
f
SNR
f
57
59.7
59.6
Signal to noise and distortion
ratio
SINAD
f
PGA
Gain range (linear scale)
Gain step size (linear scale)
Clamp
0.5
4
V/V
V/V
0.5
Clamp DAC resolution
Clamp DAC output voltage
Clamp DAC DNL
10
bits
V
REFB
-40
REFT
1
LSB
mV
Clamp output voltage error
40
REFB, REFT internal ADC reference voltage outputs (MODE= AVDD)
Reference voltage top, REFT
(AVDD=3V)
VREF = 0.5V
VREF= 1.0V
VREF = 0.5V
VREF= 1.0V
1.75
2
Reference voltage bottom,
REFB (AVDD=3V)
1.25
1
VREF Input / Output specifications (ADC Input Range = VREFx2)
Internal 0.5V reference to VREF
Internal 1V reference to VREF
REFSENSE = VREF
REFSENSE = AGND
0.5
1
V
V
External reference applied to
VREF pin
REFSENSE = AVDD
0.5
1
V
Input impedance in internal ADC
reference mode
REFSENSE = AVDD,
MODE = AVDD
14
kΩ
PP Rev 1.22 March 2002
5
w
WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
