Production Data
WM8195
INPUT VIDEO SAMPLING
tPER
tMCLKH tMCLKL
MCLK
tVSMPSU
tVSMPH
VSMP
INPUT
tVSU
tVH
tRSU
tRH
VIDEO
Figure 1 Input Video Timing
Test Conditions
AVDD1 = AVDD2 = DVDD1 = DVDD2 = DVDD3 =4.75 to 5.25V, AGND = DGND = 0V, TA = 0 to 70°C, MCLK = 24MHz
unless otherwise stated.
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
MCLK period
tPER
41.6
ns
MCLK high period
MCLK low period
VSMP set-up time
VSMP hold time
tMCLKH
tMCLKL
tVSMPSU
tVSMPH
tVSU
18.8
18.8
6
ns
ns
ns
ns
ns
ns
ns
ns
3
Video level set-up time
Video level hold time
Reset level set-up time
Reset level hold time
Notes:
10
3
tVH
tRSU
10
3
tRH
1.
2.
t
VSU and tRSU denote the set-up time required after the input video signal has settled.
Parameters are measured at 50% of the rising/falling edge.
OUTPUT DATA TIMING
MCLK
tPD
OP[13:0]
Figure 2 Output Data Timing
PD Rev 4.1 July 2005
9
w
WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
