WM8181
Advanced Information
DON'T CARE
MCLK
tPZD
64 MCLK Rising Edges
VSMP
DOUT
tPZE
tPD
Hi-Z
Hi-Z
Figure 2 Power Down/Power Up
TEST CHARACTERISTICS
AVDD = DVDD = 2.97 to 3.63V and 4.5 to 5.5V, AGND1 = AGND2 = DGND = 0V, TA = 0 to 70°C, MCLK = 24MHz
unless otherwise stated.
PARAMETER
VSMP to DOUT enabled
VSMP to DOUT enabled
MCLK to DOUT disabled
MCLK to DOUT disabled
SYMBOL
tPZE
TEST CONDITIONS
AVDD = DVDD = 3.3V
AVDD = DVDD = 3.3V
MIN
TYP
10
MAX
UNIT
ns
tPZE
10
ns
tPZD
10
ns
tPZD
10
ns
MCLK to DOUT
tPD
10
ns
propagation delay
MCLK to DOUT
tPD
AVDD = DVDD = 3.3V
15
ns
propagation delay
Note: Parameters are measured at 50% of the rising/falling edge.
MCLK
VSMP
INPUT
tVSU
tVH
VIDEO
(CCD)
VIDEO
(CIS)
Figure 3 Input Video Timing
TEST CHARACTERISTICS
AVDD = DVDD = 2.97 to 3.63V and 4.5 to 5.5V, AGND1 = AGND2 = DGND = 0V, TA = 0 to 70°C, MCLK = 24MHz
unless otherwise stated.
PARAMETER
Input video set-up time
Input video hold time
SYMBOL
tVSU
TEST CONDITIONS
MIN
TYP
10
MAX
UNIT
ns
tVH
20
ns
Notes: 1. tVSU and tRSU denote the set-up time required from when the input video signal has settled.
2. Parameters are measured at 50% of the rising/falling edge.
WOLFSON MICROELECTRONICS LTD
AI Rev 3.0 January 2000
6
WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
