WM8181
Advanced Information
PIN CONFIGURATION
ORDERING INFORMATION
DEVICE
TEMP. RANGE
PACKAGE
16-pin SOIC wide
body
XWM8181CDW
0 to 70oC
AGND1
1
2
3
4
16
15
14
13
AVDD
AGND2
VREFIN
DVDD
DOUT
VINP
MCLK
VINM
VRB
5
6
12
11
VSMP
CLAMP
VRT
NC
7
10
9
DGND
NC
8
PIN DESCRIPTION
PIN
1
NAME
AGND1
AGND2
VREFIN
VINP
TYPE
Ground
DESCRIPTION
General analogue ground (0V).
Reference analogue ground (0V).
2
Ground
3
Analogue input
Analogue input
Analogue input
Analogue output
Allows external control of the ADC references.
4
Positive video input
Negative video input
Usually one of VINP or VINM will be an externally
applied d.c. bias, the other will be a signal voltage.
5
VINM
6
VRB
Lower reference voltage. This pin must be connected to AGND and VRT via
decoupling capacitors. See Recommended External Components section for details.
7
VRT
Analogue output
Upper reference voltage. This pin must be connected to AGND and VRB via
decoupling capacitors. See Recommended External Components section for details.
8
NC
NC
No internal connection
9
No internal connection
10
11
12
DGND
CLAMP
VSMP
Ground
Digital ground (0V).
Digital input
Digital input
Connects VINP and VINM together, active high.
Video sample synchronisation pulse, at input pixel rate. Sampled on rising edge of
MCLK. See Operational Timing Diagrams for details.
13
14
15
16
MCLK
DOUT
DVDD
AVDD
Digital input
Digital output
Supply
Master clock. This clock can be applied at either 12 or 16 times the input pixel rate.
ADC serial data output, changes on falling edge of MCLK.
Digital supply (3.3V, 5V).
Supply
Analogue supply (3.3V, 5V).
POSSIBLE POWER SUPPLY COMBINATIONS
COMBINATION
AVDD (VOLTS)
DVDD (VOLTS)
1
2
3
5
3.3
5
5
3.3
3.3
AI Rev 3.0 January 2000
2
WOLFSON MICROELECTRONICS LTD
WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
