WM2633
Production Data
SOFTWARE CONFIGURATION OPTIONS
DATA FORMAT
The WM2613 writes data either to one of the DAC holding latches or to the control register
depending on the address bits A1 and A0.
A1
0
A0
0
LATCH
DAC LSW holding
DAC MSW holding
Reserved
D7
D6
D5
D4
D3
D2
D1
D0
DAC 7 DAC 6 DAC 5 DAC 4 DAC 3
DAC2
DAC 1 DAC 0
0
1
X
0
X
0
X
0
X
0
DAC 11 DAC 10 DAC 9 DAC 8
1
0
0
0
0
0
1
1
Control
X
X
X
REF1
REF0 RLDAC
PWR
SPD
Table 2 Register Map
PROGRAMMABLE SETTLING TIME
Settling time is a software selectable 3.5µs or 1µs, typical to within ±0.5LSB of final value. This is
controlled by the value of SPD – Bit D12. A ONE defines a settling time of 1µs, a ZERO defines a
settling time of 3.5µs.
PIN
BIT
SPD
0
MODE
SPD
0
0
1
1
Slow
Fast
Fast
Fast
1
0
1
Table 3 Programmable Settling Time
PROGRAMMABLE POWER DOWN
The power down function can be controlled by PWR. A ZERO configures the device as active, or fully
powered up, a ONE configures the device into power down mode. When the power down function is
released the device reverts to the DAC code set prior to power down.
PIN
BIT
POWER
NPD
PWD
0
0
1
1
0
1
0
1
Down
Down
Normal
Down
Table 4 Programmable Power Down
LOAD DAC LATCH
Bit RLDAC controls the function of the DAC latch. A ONE configures the DAC latch as transparent. A
ZERO configures the DAC latch to be controlled by pin NLDAC.
PIN
BIT
LATCH
NLDAC
RLDAC
0
0
1
1
0
1
0
1
Transparent
Transparent
Hold
Transparent
Table 5 Load DAC Latch
WOLFSON MICROELECTRONICS LTD
PD Rev 1.0 July 1999
10
WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
