WM2625
Production Data
DEVICE DESCRIPTION
GENERAL FUNCTION
The WM2625 is a dual 8-bit, voltage output DAC operating from a single supply. It uses a resistor
string network buffered with an op amp to convert 8-bit digital data to analogue voltage levels (see
Block Diagram). The output voltage is determined by the reference input voltage and the input code
according to the following relationship:
CODE
V
= 2
(VREFIN
)
out
256
INPUT
OUTPUT
255
256
1111
1111
2
2
(
VREF
)
:
:
129
256
1000
1000
0111
0001
0000
1111
(VREF
)
128
256
2
(
VREF
)
= VREF
127
256
2
2
(VREF
)
)
:
:
1
0000
0000
0001
0000
(VREF
256
0V
Table 1 Binary Code Table (0V to 2VREF Output), Gain = 2
POWER ON RESET
An internal power-on-reset circuit resets the DAC register to all 0s on power-up.
BUFFER AMPLIFIER
The output buffer has a near rail-to-rail output with short circuit protection and can reliably drive a
2kΩ load with a 100pF load capacitance.
EXTERNAL REFERENCE
The reference voltage input is buffered which makes the DAC input resistance independent of
code. The REF pin has an input resistance of 10MΩ and an input capacitance of typically 5pF. The
reference voltage determines the DAC full-scale output.
SERIAL INTERFACE
Before writing any data to the WM2625, the interface must be enabled by setting NCS to low.
Incoming data on DIN (starting with the MSB) is then shifted bit-per-bit into the internal register on
the falling edges of SCLK. From there data is loaded into the target latch after 16 bits have been
transferred, or when NCS rises. Three internal latches can be addressed: DAC A, DAC B, or the
buffer latch. This makes it possible to update both DACs simultaneously or to update one
independently of the other (see ‘Addressing the Buffer and DAC Latches’, below).
SERIAL CLOCK AND UPDATE RATE
Figure 1 shows the device timing. The maximum serial rate is:
1
fSCLK max
=
= 20MHz
tWH min + tWLmin
WOLFSON MICROELECTRONICS LTD
PD Rev 1.0 April 2001
6
WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
