W90N745CD/W90N745CDG
*In the following pin definition, mark with shading is default function.
11
10
NAME
01
NAME
nXDACK
00
PT1CFG0
NAME
TYPE
TYPE
TYPE
NAME
GPIO18
TYPE
PORT1_0
-
-
-
O
I/O
11
10
01
00
PT1CFG1
NAME
TYPE
NAME
TYPE
NAME
TYPE
NAME
TYPE
PORT1_1
-
-
-
nXDREQ
I
GPIO19
I/O
GPIO Port1 Direction Register (GPIO_DIR1)
REGISTER
ADDRESS
R/W
DESCRIPTION
RESET VALUE
GPIO_DIR1
0xFFF8_3014
R/W
GPIO port0 in/out direction control 0x0000_0000
and pull-up enable register
31
23
15
7
30
22
14
6
29
21
28
20
12
4
27
RESERVED
19
26
18
10
2
25
17
24
16
8
RESERVED
PUPEN1[1:0]
13
11
RESERVED
3
9
5
1
0
RESERVED
OMDEN1[1:0]
BITS
DESCRIPTION
[31:18]
[17:16]
[15:2]
RESERVED
PUPEN1
-
GPIO19 ~ GPIO18 port pins internal pull-up resister enable
This is a 2-bit registers, set corresponding bit to “1” will enable pull
up resister in IO pin.
1 = enable
0 = disable
After power on the resisters are disabled.
RESERVED
-
Publication Release Date: September 22, 2006
- 321 -
Revision A2