W90N745CD/W90N745CDG
GPIO Port0 Data Input Register (GPIO_DATAIN0)
REGISTER
ADDRESS
R/W
DESCRIPTION
RESET VALUE
GPIO_DATAIN0
0xFFF8_300C
R/W
GPIO port0 data input register
0xXXXX_XXXX
31
23
15
7
30
29
21
13
5
28
27
19
26
18
10
25
17
9
24
16
8
RESERVED
22
14
6
20
RESERVED
12
11
3
RESERVED
4
2
1
0
RESERVED
DATAIN0
BITS
DESCRIPTION
[31:5]
RESERVED
-
PORT0 data input value
The DATAIN0 indicates the status of each GPIO0~GPIO4 port pin
regardless of its operation mode. The reserved bits will be read as
“0”.
[4:0]
DATAIN0
GPIO Port1 Configuration Register (GPIO_CFG1)
REGISTER
ADDRESS
R/W
DESCRIPTION
RESET VALUE
GPIO_CFG1
0xFFF8_3010
R/W
GPIO port1 configuration register
0x0000_0000
31
23
15
7
30
22
14
6
29
21
13
5
28
27
19
26
18
10
2
25
17
9
24
16
8
RESERVED
20
RESERVED
12
11
3
RESERVED
4
1
0
RESERVED
PT1CFG1
PT1CFG0
- 320 -
WINBOND [ WINBOND ]
