W90N745CD/W90N745CDG
Continued.
BITS
DESCRIPTION
PortOverCurrentIndicatorChange
[19]
POCIC
PSSC
This bit is set when OverCurrentIndicator changes. Writing a '1' clears this bit.
Writing a '0' has no effect.
PortSuspendStatusChange
This bit indicates the completion of the selective resume sequence for the port.
0 = Port is not resumed.
[18]
1 = Port resume is complete.
PortEnableStatusChange
This bit indicates that the port has been disabled due to a hardware event
(cleared PortEnableStatus).
[17]
PESC
0 = Port has not been disabled.
1 = PortEnableStatus has been cleared.
ConnectStatusChange
This bit indicates a connect or disconnect event has been detected. Writing a '1'
clears this bit. Writing a '0' has no effect.
[16]
CSC
0 = No connect/disconnect event.
1 = Hardware detection of connect/disconnect event.
Note: If DeviceRemoveable is set, this bit resets to '1'.
Reserved. Read/Write 0's
[15:10]
Reserved
(Read) LowSpeedDeviceAttached
This bit defines the speed (and bud idle) of the attached device. It is only valid
when CurrentConnectStatus is set.
0 = Full Speed device
[9]
LSDA
1 = Low Speed device
(Write) ClearPortPower
Writing a '1' clears PortPowerStatus. Writing a '0' has no effect
(Read) PortPowerStatus
This bit reflects the power state of the port regardless of the power switching
mode.
0 = Port power is off.
1 = Port power is on.
[8]
PPS
Note: If NoPowerSwitching is set, this bit is always read as '1'.
(Write) SetPortPower
Writing a '1' sets PortPowerStatus. Writing a '0' has no effect.
Reserved. Read/Write 0's
[7:5]
Reserved
Publication Release Date: September 22, 2006
- 189 -
Revision A2
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