W83759A
CRX8Ah (PD1TIM0)
Bit 7 Bit 6
Read/Write
Bit 5
Primary Drive1 Timing Control 0
Bit 4 Bit 3 Bit 2
Bit 1
Bit 0
PD1ACT3 PD1ACT2 PD1ACT1 PD1ACT0 PD1RCV3 PD1RCV2 PD1RCV1 PD1RCV0
PD1 Data Register Port (1F0h) Read/Write Active Time
Bit 7- Bit 4
Bit 3- Bit 0
PD1ACT3- 0
PD1RCV3- 0
Definition of these bits same as PD0ACT3- 0
PD1 Data Register Port (1F0h) Read/Write Recovery Time
Definition of these bits same as PD0RCV3- 0
CRX8Bh (PD1TIM1)
Read/Write
Bit 5
Primary Drive 1 Timing Control 1
Bit 7
Bit 6
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
PD1AST1
PD1AST0
PD1DHT1
PD1DHT0
PD1ADV
PD1PRE
PD1DMA
PD1RDY
Bit 7-Bit 6
PD1 Data Register Port (1F0h) Address Setup Time
Definition of these bits same as PD0AST1-0
PD1AST1- 0
PD1DHT1- 0
Bit 5-Bit 4
Bit 3
PD1 Data Register Port (1F0h) Data Hold Time
Definition of these bits same as PD0DHT1- 0
PD1 Prefetch/Post write control
PD1PRE
PD1DMA
0
1
Prefetch/Post write enabled
Prefetch/Post write disabled
Bit 2
Bit 1
Bit 0
PD1 DMA mode control
0
1
DMA mode enabled
DMA mode disabled
PD1 Data Register Port (1F0h) IOCHRDY Control
PD1RDY
PD1ADV
0
1
OCHRDY enabled
IOCHRDY disabled
PD1 Data Register Port (1F0h) Advanced Timing Enable
0
Normal timing (depends on SP1, MD1, MD0
setting)
1
Advanced timing (depends on PD1TIM1- 0 setting)
Publication Release Date: May 1995
- 23 -
Revision A1
WINBOND [ WINBOND ]
