W83759A
Continued
Bit 4
SD1LEN_P
DSL1, 0_P
Secondary Drive 1(SD1) local device control
0
1
Disable local device
Enable local device
Bit 3, 2
Device ID selection (used in multi-chip mode or CR
protection scheme)
DSL1_P
DSL0_P
Device ID
0
0
1
1
0
1
0
1
60h
61h
62h
63h
Bit 1
Bit 0
Configuration Register locked control
CRLK _P
CRSL_P
0
1
CR is auto-locked (multi-chip mode)
CR is not auto-locked (single-chip mode)
Configuration Register selection
0
1
CR port address: 130h, 134h, 138h, 13Ch
CR port address: 1B0h, 1B4h, 1B8h, 1BCh
CRX84h (POSS3)
Read Only
Power-on Setting Status 3
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
APD
Bit 0
SUSPEN
STBY#
PD0EM
PD1EM
SD0EM
SD1EM
SWAP
Bit 7
Power-on setting value of IDD15 pin
Initial setting of PD0 enhanced timing enable
PD0EM
PD1EM
SD0EM
0
1
Enhanced timing
Programmable timing
Bit 6
Bit 5
Power-on setting value of IDD14 pin
Initial setting of PD1 enhanced timing enable
0
1
Enhanced timing
Programmable timing
Power-on setting value of IDD13 pin
Initial setting of SD0 enhanced timing enable
0
1
Enhanced timing
Programmable timing
- 16 -
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