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W25Q128BV 参数 Datasheet PDF下载

W25Q128BV图片预览
型号: W25Q128BV
PDF下载: 下载PDF文件 查看货源
内容描述: 具有双路和四路SPI 3V 128M位串行闪存 [3V 128M-BIT SERIAL FLASH MEMORY WITH DUAL AND QUAD SPI]
分类和应用: 闪存
文件页数/大小: 74 页 / 756 K
品牌: WINBOND [ WINBOND ]
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W25Q128BV  
8.6 AC Electrical Characteristics  
SPEC  
UNIT  
DESCRIPTION  
SYMBOL  
ALT  
MIN  
TYP  
MAX  
Clock frequency for Dual I/O & Quad SPI  
Instructions  
FR  
FR  
fC  
fC  
D.C.  
70  
MHz  
Clock frequency for all Single SPI, Dual Output  
Instructions except Read Data (03h)  
D.C.  
D.C.  
6
104  
33  
MHz  
MHz  
ns  
Clock frequency for Read Data instruction (03h)  
fR  
Clock High, Low Time  
for all Quad SPI instructions  
tCLH1,  
tCLL1  
(1)  
Clock High, Low Time  
for Single/Dual instructions except Read Data (03h)  
tCLH1,  
tCLL1  
4
8
ns  
ns  
(1)  
Clock High, Low Time  
for Read Data (03h) instruction  
tCRLH,  
(1)  
tCRLL  
(2)  
Clock Rise Time peak to peak  
tCLCH  
0.1  
0.1  
5
V/ns  
V/ns  
ns  
(2)  
Clock Fall Time peak to peak  
tCHCL  
/CS Active Setup Time relative to CLK  
/CS Not Active Hold Time relative to CLK  
Data In Setup Time  
tSLCH  
tCHSL  
tDVCH  
tCHDX  
tCHSH  
tSHCH  
tSHSL1  
tSHSL2  
tCSS  
5
ns  
tDSU  
tDH  
2
ns  
Data In Hold Time  
5
ns  
/CS Active Hold Time relative to CLK  
/CS Not Active Setup Time relative to CLK  
/CS Deselect Time (for Array Read Æ Array Read)  
5
ns  
5
ns  
tCSH  
tCSH  
10  
50  
50  
ns  
/CS Deselect Time (for Erase or Program Æ Read  
Status Registers)  
Volatile Status Register Write Time  
ns  
(2)  
Output Disable Time  
tSHQZ  
tDIS  
tV1  
7
ns  
ns  
Clock Low to Output Valid  
2.7V-3.6V / 3.0V-3.6V  
tCLQV1  
7 / 6  
Clock Low to Output Valid (for Read ID instructions)  
2.7V-3.6V / 3.0V-3.6V  
tCLQV2  
tCLQX  
tV2  
8.5 / 7.5  
ns  
ns  
Output Hold Time  
tHO  
0
Continued – next page  
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