WED2ZLRSP01S
White Electronic Designs
TRUTH TABLES
SYNCHRONOUS TRUTH TABLE
CEx# ADV
WE# BWx#
OE# CKE# CK
Address Accessed
N/A
Operation
H
X
L
L
H
L
X
X
H
X
H
X
L
X
X
X
X
X
X
L
X
X
L
L
L
L
L
L
L
L
L
L
L
H
↑
↑
↑
↑
↑
↑
↑
↑
↑
↑
↑
Deselect
Continue Deselect
Begin Burst Read Cycle
Continue Burst Read Cycle
NOP/Dummy Read
Dummy Read
Begin Burst Write Cycle
Continue Burst Write Cycle
NOP/Write Abort
N/A
External Address
Next Address
External Address
Next Address
External Address
Next Address
N/A
X
L
H
L
L
H
H
X
X
X
X
X
X
L
H
L
X
L
H
L
X
L
X
X
L
H
H
X
X
X
H
X
Next Address
Current Address
Write Abort
Ignore Clock
NOTES:
1. X means “Don’t Care.”
2. The rising edge of clock is symbolized by ( ↑ )
3. A continue deselect cycle can only be entered if a deselect cycle is executed first.
4. WRITE# = L means Write operation in WRITE TRUTH TABLE.
WRITE# = H means Read operation in WRITE TRUTH TABLE.
5. Operation finally depends on status of asynchronous input pins (ZZ and OE#).
6. CEx# refers to the combination of CE1#, CE2 and CE2#.
7. Applies to each of the independent arrays.
WRITE TRUTH TABLE
WE# BWa# BWb# BWc# BWd#
Operation
H
L
L
L
L
L
L
X
L
H
H
H
L
X
H
L
H
H
L
X
H
H
L
H
L
X
H
H
H
L
Read
Write Byte a
Write Byte b
Write Byte c
Write Byte d
Write All Bytes
Write Abort/NOP
L
H
H
H
H
NOTES:
1. X means “Don’t Care.”
2. All inputs in this table must meet setup and hold time around the rising
edge of CK ( ↑ ).
3. Applies to each of the independent arrays.
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
April, 2002
Rev. 0
4
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
WEDC [ WHITE ELECTRONIC DESIGNS CORPORATION ]
