W764M32V-XSBX
White Electronic Designs
ADVANCED*
FIGURE 12: ALTERNATE CS# CONTROLLED WRITE (ERASE/PROGRAM) OPERATION TIMINGS
555 for Program
2AA for Erase
PA for Program
SA for Sector Erase
555 for Chip Erase
Data# Polling
PA
Addresses
WE#
tAS
t
WC
tAH
tWH
tGHEL
OE#
CS#
t
CP
t
WHWH1 OR 2
t
WS
tCPH
t
BUSY
t
DS
tDH
Data
DQ
7
#
DOUT
tHR
A0 for Program
55 for Erase
PD for Program
30 for Sector Erase
10 for Chip Erase
RESET#
RY/BY#
NOTES:
1. Figure indicates last two bus cycles of a program or erase operation.
2. PA = program address, SA = sector address, PD = program data.
3. DQ7 is the complement of the data written to the device. DOUT is the data written to the device.
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
March 2006
Rev. 2
14
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
WEDC [ WHITE ELECTRONIC DESIGNS CORPORATION ]
