W764M32V-XSBX
White Electronic Designs
ADVANCED*
FIGURE 7: ACCELERATED PROGRAM TIMING DIAGRAM
VHH
VIL or VIH
VIL or VIH
WP#/ACC
tVHH
tVHH
FIGURE 8: CHIP/SECTOR ERASE OPERATION TIMINGS
tWC
tAS
Addresses
2AAh
SA
VA
VA
555h for
tAH
chip erase
CS#
OE#
tCH
tDH
tWP
WE#
tCS
tWHWH2
tWPH
tDS
In
55h
Complete
tRB
30h
10 for Chip Erase
Data
Progress
tBUSY
RY/BY#
VCC
tVCS
NOTES: 1. SA = Sector Address (for Sector Erase), VA = Valid Address for reading status data
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
March 2006
Rev. 2
10
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com