Preliminary
VG4632321A
524,288x32x2-Bit
CMOS Synchronous Graphic RAM
VIS
Figure 2. AC Parameters for Read Timing (Burst Length = 2, CAS Latency = 2)
T0
T1
T2
T3
T4
T5
T6
T7
T8
T9
T10 T11 T12 T13
CLK
t
t
t
CH CL
CK2
Begin Auto Precharge
Bank B
t
t
IS
IH
CKE
CS
t
IH
t
IS
RAS
CAS
WE
DSF
BS
t
IH
RBx
RAy
RAy
A9
RAx
t
IS
A0 ~ A8
CAx
RRD
RAx
RBx
t
CBx
t
RAS
t
RC
DQM
DQ
t
t
t
t
AC2
AC2
HZ
RP
t
t
t
RCD
OH
LZ
Hi-Z
Ax0
Bx0
Bx1
Ax1
Activate
Command
Bank A
Activate
Command
Bank B
Read with
Precharge
Command
Bank A
Activate
Command
Bank A
Read
Command
Bank A
Auto Precharge
Command
Bank B
Document:
Rev.1
Page2