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VG4632321AQ-7 参数 Datasheet PDF下载

VG4632321AQ-7图片预览
型号: VG4632321AQ-7
PDF下载: 下载PDF文件 查看货源
内容描述: 524,288x32x2位CMOS同步图形RAM [524,288x32x2-Bit CMOS Synchronous Graphic RAM]
分类和应用:
文件页数/大小: 81 页 / 1954 K
品牌: VML [ VANGUARD INTERNATIONAL SEMICONDUCTOR ]
 浏览型号VG4632321AQ-7的Datasheet PDF文件第8页浏览型号VG4632321AQ-7的Datasheet PDF文件第9页浏览型号VG4632321AQ-7的Datasheet PDF文件第10页浏览型号VG4632321AQ-7的Datasheet PDF文件第11页浏览型号VG4632321AQ-7的Datasheet PDF文件第13页浏览型号VG4632321AQ-7的Datasheet PDF文件第14页浏览型号VG4632321AQ-7的Datasheet PDF文件第15页浏览型号VG4632321AQ-7的Datasheet PDF文件第16页  
Preliminary  
VG4632321A  
524,288x32x2-Bit  
CMOS Synchronous Graphic RAM  
VIS  
DQ  
inputs  
Column Address  
DQ Planes  
Controlled  
DQ  
Inputs  
Column Address  
DQ Planes  
Controlled  
A2  
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
A1  
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
A0  
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
A2  
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
A1  
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
A0  
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
DQ0  
DQ1  
0~7  
0~7  
DQ16  
DQ17  
DQ18  
DQ19  
DQ20  
DQ21  
DQ22  
DQ23  
DQ24  
DQ25  
DQ26  
DQ27  
DQ28  
DQ29  
DQ30  
DQ31  
16~23  
16~23  
16~23  
16~23  
16~23  
16~23  
16~23  
16~23  
24~31  
24~31  
24~31  
24~31  
24~31  
24~31  
24~31  
24~31  
DQ2  
0~7  
DQ3  
0~7  
DQ4  
0~7  
DQ5  
0~7  
DQ6  
0~7  
DQ7  
0~7  
DQ8  
8~15  
8~15  
8~15  
8~15  
8~15  
8~15  
8~15  
8~15  
DQ9  
DQ10  
DQ11  
DQ12  
DQ13  
DQ14  
DQ15  
The overall Block Write mask consists of a combination of the DQM inputs, the Mask register,  
and the column/byte mask information, as shown in the following diagram. The DQM and Mask reg-  
ister masking operates as for normal Write command, with the exception that the mask information  
is applied simultaneously to all eight columns. Therefore, in a Block Write, a given bit is written only if  
a ”0” was registered for the corresponding DQM input, a ”1” was registered for the corresponding DQ  
signal, and the corresponding bit in the Mask register is ”1”.  
A block write access requires a time period of tBWC to execute, so in general, there should be  
m NOP cycles, m equals (tBWC-tCK) /tCK rounded up to the next whole number, after the Block Write  
command. However, BankActivate or BankPrecharge commands to the other bank are allowed.  
When following a Block Write with a BankPrecharge or PrechargeAll command to the same bank, tBPL  
must be met.  
Document:  
Rev.1  
Page12  
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