Preliminary
VG37648041AT
256M:x4, x8, x16
VIS
CMOS Synchronous Dynamic RAM
4. The following states must not be interrupted by a command issued to the same bank, COMMAND
INHIBIT or NOP commands, or allowable commands to the other bank should be issued on any clock
edge occurring during these states. Allowable commands to the other bank are determined by its cur-
rent state and Truth Table3, and according to Truth Table 4.
Precharging: Starts with registration of a PRECHARGE command and ends when tRP is met. Once
tRP is met, the bank will be in the idle state.
Row Activating: Starts with registration of an ACTIVE command and ends when tRCD is met. Once
tRCD is met, the bank will be in the “row active” state.
Read w/Auto-
Precharge Enabled: Starts with registration of a READ command with AUTO PRECHARGE
enabled and ends when tRP has been met. Once tRP is met, the bank will be
in the idle state.
Write w/Auto-
Precharge Enabled: Starts with registration of a WRITE command with AUTO PRECHARGE
enabled and ends when tRP has been met. Once tRP is met, the bank will be
in the idle state.
Write w/Auto
Precharge Enabled: Starts with registrayion of a WRITE command with AUTO PRECHARGE
enabled and ends when tRP has been met. Once tRP is met, the bank will be
in the idle state.
5.The following states must not be interrupted by any executable command; COMMAND INHIBIT or NOP
commands must be applied on each positive clock edge during these states.
t
Refreshing: Starts with registration of an AUTO REFERESH command and ends when RC is met.
Once tRC is met, the DDR SDRAM will be in the “all banks idle” state.
Accessing Mode
Register: Starts with registration of a LOAD MODE REGISTER command and ends when tMTC has
been met. Once tMTC is met, the DDR SDRAM will be in the “all banks idle” state.
t
Precharging All: Starts with registration of a PRECHARGE ALL command and ends when RP is
met. Once tRP is met, all banks will be in the idle state.
6. All states and sequences not shown are illegal or reserved.
7. Not bank-specific; reguired that all banks are idle.
8. May or may not be bank-specific; if all banks are to be precharged, all must be in a valid state for pre-
charging.
9. Not bank-specific; BURST TERMINATE affects the most recent READ burst, regardless of bank.
10. READs or WRITEs listed in the Command/Action column include READs or WRITEs with AUTO
PRECHARGE enabled and READs or WRITEs with AUTO PRECHARGE disabled.
Document : 1G5-0157
Rev.1
Page64
VML [ VANGUARD INTERNATIONAL SEMICONDUCTOR ]
