Preliminary
VG37648041AT
256M:x4, x8, x16
VIS
CMOS Synchronous Dynamic RAM
PRECHARGE
The PRECHARGE command is used to deactivate the open row in a particular bank or the open
row in all banks. The bank(s) will be available for a subsequent row access some specified time (tRP
)
after the PRECHARGE command is issued. Input A10 determines whether one or all banks are to be
precharged, and in the case where only one bank is to be prcharged, inputs BA0,BA1 select the bank.
When all banks are to be precharged, inputs BA0,BA1 are treated as “Dont’ Care.” Once a bank has
been precharged, it is in the idle state and must be activated prior to any READ or WRITE commands
being issued to that bank.
POWER-DOWN
Power-down is entered when CKE is registered LOW (no accesses can be in progress). If power-
down occurs when all banks are idle, this mode is referred to as precharge power down; if power-
down occurs when there is a row active in either bank, this mode is referred to as active power-down.
Entering power-down deactivates the input and output buffers, excluding CLK, CLK# and CKE. For
maximum power savings, the user has the option of disabling the DLL prior to entering Power-down.
In that case, the DLL must be enabled after exiting power-down, and 200 clock cycles must occur
before a READ command can be issued. In either case, CKE LOW and a stable clock signal should
be maintained at the inputs of the DDR SDRAM, and all other input signals are “Dont’ Care”. The
device may not remain in the power-down state loger than the refresh period (64ms) since no refersh
operations are performed in this mode.
The power-down state is exited when CKE is registered HIGH, and a command may be
applied be applied one clock cycle later.
CLK#
CLK
tIS
tIS
CLK#
CLK
COMMAND
VALID
NOP
VALID
No column
access
in progress
Exit power-down
mode
Enter power-down
mode
DONT’ CARE
Figure 35
POWER-DOWN
Document : 1G5-0157
Rev.1
Page61
VML [ VANGUARD INTERNATIONAL SEMICONDUCTOR ]
