Preliminary
VG36648041CT
CMOS Synchronous Dynamic RAM
VIS
Auto Precharge after Write Burst (2 of 2)
Burst Length=4, CAS Latency=3
T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 T10 T11 T12 T13 T14 T15 T16 T17 T18 T19 T20 T21 T22
CLK
CKE
CS
t
CK3
Start Auto Precharge
High
Start Auto
Precharge
Bank A
Start Auto Precharge
(Bank D)
Bank B
(Bank D)
Bank B
RAS
CAS
WE
BS
Ra
Ra
Rb
Rb
Ra
A10
Ca
RBb
Ca
Cb
Ra
Cb
ADD
DQM
Hi-Z
QBa0
QAb0
DQ
QAa3
QBa1 QBa2 QBa3
QAb1 QAb2 QAb3
QBb0 QBb1 QBb2
QAa0 QAa1
QAa2
Activate
Command
Bank B
(Bank D)
Write with
Auto precharge
Command
Activate
Command
Bank A
Activate
Command
Bank B
Read with
Read with
Auto Precharge
Command
Bank A
Auto Precharge
Command
Bank B (Bank D)
(Bank D)
Bank B
(Bank D)
Read
Command
Bank A
Document : 1G5-0153
Rev.1
Page57
VML [ VANGUARD INTERNATIONAL SEMICONDUCTOR ]
