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VG26V17400FJ-5 参数 Datasheet PDF下载

VG26V17400FJ-5图片预览
型号: VG26V17400FJ-5
PDF下载: 下载PDF文件 查看货源
内容描述: 4194304 ×4 - 位CMOS动态RAM [4,194,304 x 4 - Bit CMOS Dynamic RAM]
分类和应用:
文件页数/大小: 25 页 / 210 K
品牌: VML [ VANGUARD INTERNATIONAL SEMICONDUCTOR ]
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VG26(V)(S)17400FJ  
4,194,304 x 4 - Bit  
CMOS Dynamic RAM  
VIS  
Read Cycle  
VG26 (V) (S) 17400E  
-5 -6  
Unit  
60 ns  
Notes  
Min  
Max  
50  
Min  
Max  
Parameter  
Symbol  
tRAC  
-
12  
Access time from RAS  
-
tCAC  
tAA  
13,14  
14,15  
Access time from CAS  
-
-
13  
25  
12  
-
-
-
15 ns  
30 ns  
15 ns  
Access time from column address  
Access time from OE  
tOEA  
tRCS  
tRCH  
tRRH  
tOFF  
tOEZ  
-
-
7
10,16  
16  
Read command setup time  
Read command hold time to CAS  
Read command hold time to RAS  
Output buffer turn-off time  
0
0
0
0
-
-
-
ns  
ns  
ns  
-
10  
0
-
10  
0
17  
12  
12  
15 ns  
ns  
17  
Output buffer turn-off time from OE  
0
0
15  
Write Cycle  
VG26 (V) (S) 17400E  
-5 -6  
Unit  
Notes  
7,18  
Min  
Max  
Min  
Max  
Parameter  
Symbol  
tWCS  
Write command setup time  
Write command hold time  
Write command pulse width  
Write command to RAS lead time  
Write command to CAS lead time  
Data-in setup time  
0
-
-
-
-
-
-
-
0
-
-
-
-
-
-
-
ns  
ns  
ns  
ns  
ns  
tWCH  
tWP  
8
8
10  
10  
15  
10  
0
tRWL  
tCWL  
tDS  
13  
8
19  
19  
0
ns  
ns  
tDH  
Data-in hold time  
8
10  
Read - Modigy - Write Cycle  
VG26 (V) (S) 17400E  
-5 -6  
Unit  
Notes  
Min  
108  
Max  
Min  
133  
Max  
Parameter  
Symbol  
tRWC  
Read - modify - write cycle time  
-
-
-
-
-
-
-
-
-
-
ns  
ns  
ns  
RAS to WE delay time  
tRWD  
tCWD  
tAWD  
tOEH  
64  
26  
39  
8
77  
32  
47  
10  
18  
18  
18  
CAS to WE delay time  
Column address to WE delay time  
OE hold time from WE  
ns  
ns  
Document :  
Rev.  
Page11