VSC8601 Datasheet
Design Considerations
8.5
On-Chip Pull-up Resistor Violation
Issue: According to the IEEE standard 802.3, the MDIO pin on a slave device should be
an open-drain pad type and drive a low value onto the MDIO shared bus. The MDIO
shared bus should be pulled high with a pull-up resistor on the PCB or SMI bus master.
The VSC8601 device includes a 100 kΩ pull-up on-chip resistor that violates this IEEE
specification.
Implication: The VSC8601 device requires an off-chip and on-chip pull-up resistor for
the interface to operate correctly. The typical value of the off-chip resistor is relatively
small at <1 kΩ, which maintains a short rise time of the MDIO signal. Adding a 100 kΩ
pull-up on-chip resistor in parallel with the off-chip pull-up resistor, does not have any
practical implications.
Workaround: No workaround is needed.
8.6
Setting the Internal RGMII Timing Compensation
Value
Issue: There are two inter-related registers to control the internal RGMII skew timing
compensation. The finest level of control is through register 28E.15:12, which has four
settings (0 ns, 1.4 ns, 1.7 ns, and 2.0 ns) for either Rx or Tx. Alternatively, register
23.8 provides a simpler level of control (0 ns or 1.7 ns for both Rx and Tx) for
compatibility with legacy Vitesse PHY software. A write to either register automatically
affects the other so that they are logically consistent. However, this relationship means
the legacy control of register 23.8 can potentially overwrite the finer-level controls in
register 28E.
Implication: If you intend to use the skew compensation settings in 28E, always write
to this register after, not before, a write to register 23. For example, suppose
register 23.8 is set to 1 (1.7 ns) and then register 28E.15:12 is set to 0101 (1.4 ns);
the resulting delay is 1.4 ns. A subsequent write to register 23, even if bit 8 is kept
as 1, automatically changes register 28E to 1010 (1.7 ns).
Workaround: Before performing a write to register 23, first read and store the settings
in register 28E. After writing to register 23, write the stored value back to register 28E.
8.7
10BASE-T Harmonics at 30 MHz and 50 MHz
Marginally Violate Specification
Issue: The IEEE 802.3 specification states that in 10BASE-T mode, when the DO circuit
is driven by an all-ones, Manchester-encoded signal, any harmonic measured on the TD
circuit must be at least 27 dB below the fundamental. In VSC8601, this specification is
marginally violated at 30 MHz and 50 MHz when this measurement is made under
corner conditions. Under nominal conditions, this measurement meets the IEEE
specification limits.
Implications: This violation has no practical implication on the performance of the
device. 10BASE-T mode has been validated to work without any issues with cables far
exceeding the IEEE-specified, worst-case limits.
Workaround: None required.
Revision 4.1
September 2009
Page 99
VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
