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VSC8601XKN 参数 Datasheet PDF下载

VSC8601XKN图片预览
型号: VSC8601XKN
PDF下载: 下载PDF文件 查看货源
内容描述: VSC8601 10/100 / 1000BASE -T PHY与MAC RGMII接口 [VSC8601 10/100/1000BASE-T PHY with RGMII MAC Interface]
分类和应用: 网络接口电信集成电路电信电路局域网(LAN)标准以太网:16GBASE-T
文件页数/大小: 102 页 / 861 K
品牌: VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
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VSC8601 Datasheet  
Design Considerations  
PhyWrite (PortNo, 16, 0x87b4); // Necessary write of internal register  
PhyWrite (PortNo, 16, 0xa794); // Necessary write of internal register  
reg = PhyRead (PortNo, 18); // Read internal reg. and assign it to var.  
PhyWrite (PortNo, 18, reg); // Necessary write of internal register  
reg = PhyRead (PortNo, 17); // Read internal reg. and assign it to var.  
reg = (reg & ~0x003f) | 0x003e;// Modify variable value  
PhyWrite (PortNo, 17, reg); // Write back modified internal register  
PhyWrite (PortNo, 16, 0x8794); // Necessary write of internal register  
PhyWrite (PortNo, 18, 0xf7); // Necessary write of internal register  
PhyWrite (PortNo, 17, 0xbe36); // Necessary write of internal register  
PhyWrite (PortNo, 16, 0x879e); // Necessary write of internal register  
PhyWrite (PortNo, 16, 0xa7a0); // Necessary write of internal register  
reg = PhyRead (PortNo, 18); // Read internal reg. and assign it to var.  
PhyWrite (PortNo, 18, reg); // Necessary write of internal register  
reg = PhyRead (PortNo, 17); // Read internal reg. and assign it to var.  
reg = (reg & ~0x003f) | 0x0034;// Modify variable value  
PhyWrite (PortNo, 17, reg); // Write back modified internal register  
PhyWrite (PortNo, 16, 0x87a0); // Necessary write of internal register  
PhyWrite (PortNo, 18, 0x3c); // Necessary write of internal register  
PhyWrite (PortNo, 17, 0xf3cf); // Necessary write of internal register  
PhyWrite (PortNo, 16, 0x87a2); // Necessary write of internal register  
PhyWrite (PortNo, 18, 0x3c); // Necessary write of internal register  
PhyWrite (PortNo, 17, 0xf3cf); // Necessary write of internal register  
PhyWrite (PortNo, 16, 0x87a4); // Necessary write of internal register  
PhyWrite (PortNo, 18, 0x3c); // Necessary write of internal register  
PhyWrite (PortNo, 17, 0xd287); // Necessary write of internal register  
PhyWrite (PortNo, 16, 0x87a6); // Necessary write of internal register  
PhyWrite (PortNo, 16, 0xa7a8); // Necessary write of internal register  
reg = PhyRead (PortNo, 18); // Read internal reg. and assign it to var.  
PhyWrite (PortNo, 18, reg); // Necessary write of internal register  
reg = PhyRead (PortNo, 17); // Read internal reg. and assign it to var.  
reg = (reg & ~0x0fff) | 0x0125;// Modify variable value  
PhyWrite (PortNo, 17, reg); // Write back modified internal register  
PhyWrite (PortNo, 16, 0x87a8); // Necessary write of internal register  
PhyWrite (PortNo, 31, 0); // Select main register page  
Revision 4.1  
September 2009  
Page 98  
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