VSC8601 Datasheet
Functional Descriptions
Figure 8.
SMI Read Frame
Station Manager Drives MDIO
PHY Drives MDIO
MDC
MDIO
Z
Z
1
0
1
1
0
A4 A3 A2 A1 A0 R4 R3 R2 R1 R0
Z
0
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
Register Data from PHY
Z
Z
Idle Preamble SFD
(optional)
Read
PHY Address
Register Address
to PHY
TA
Idle
Figure 9.
SMI Write Frame
Station Manager Drives MDIO (PHY tristates MDIO during entire sequence)
MDC
MDIO
Z
Z
1
0
1
0
1
A4 A3 A2 A1 A0 R4 R3 R2 R1 R0
1
0
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
Register Data from PHY
Z
Z
Idle Preamble SFD
(optional)
Write
PHY Address
Register Address
to PHY
TA
Idle
The following provides additional information about the terms used in Figure 8 and
Figure 9.
Idle During idle, the MDIO node goes to a high-impedance state. This allows an
external pull-up resistor to pull the MDIO node up to a logical 1 state. Because the idle
mode should not contain any transitions on MDIO, the number of bits is undefined
during idle.
Preamble By default, preambles are not expected nor required. The preamble is a
string of ones. If it exists, the preamble must be at least one bit; otherwise, it may be
of an arbitrary length.
Start of Frame (SFD) A pattern of 01 indicates the start of frame. If the pattern is
not 01, all following bits are ignored until the next preamble pattern is detected.
Read or Write Opcode A pattern of 10 indicates a read. A pattern of 01 indicates a
write. If these bits are not either 01 or 10, all following bits are ignored until the next
preamble pattern is detected.
PHY Address The VSC8601 responds to a message frame only when the received
PHY address matches its physical address. The physical address is five bits long (4:0).
The bits are set by the CMODE pins.
Register Address The next five bits are the register address.
Turn-around The two bits used to avoid signal contention when a read operation is
performed on the MDIO are called the turn-around (TA) bits. During read operations,
the VSC8601 device drives the second TA bit, which is a logical 0.
Data The 16-bits read from or written to the device are considered the data or data
stream. When data is read from a PHY, it is valid at the output from one rising edge of
Revision 4.1
September 2009
Page 26
VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
