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VSC8601XKN 参数 Datasheet PDF下载

VSC8601XKN图片预览
型号: VSC8601XKN
PDF下载: 下载PDF文件 查看货源
内容描述: VSC8601 10/100 / 1000BASE -T PHY与MAC RGMII接口 [VSC8601 10/100/1000BASE-T PHY with RGMII MAC Interface]
分类和应用: 网络接口电信集成电路电信电路局域网(LAN)标准以太网:16GBASE-T
文件页数/大小: 102 页 / 861 K
品牌: VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
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VSC8601 Datasheet  
Functional Descriptions  
The following illustration shows the relationship between ActiPHY states and timers.  
Figure 7.  
ActiPHY State  
Low-Power State  
Signal Energy Detected on  
FLP Burst  
Signal Sent  
Media  
Sleep Timer Expires  
Timeout Timer Expires and  
Auto-Negotiation Enabled  
LP Wake-up  
State  
Normal  
Operation  
3.10.1  
Low-Power State  
In the low-power state, all major digital blocks are powered down. However, the  
following functionality is provided:  
SMI interface (MDC, MDIO, MDINT)  
CLKOUT  
In this state, the PHY monitors the media interface pins for signal energy. The PHY  
comes out of low-power state and transitions to the normal operating state when signal  
energy is detected on the media. This happens when the PHY is connected to one of the  
following:  
Auto-negotiation capable link partner  
Auto-negotiation incapable (blink/forced) link partner (100BASE-TX or 10BASE-T)  
Another PHY in ActiPHY LP wake-up state  
In the absence of signal energy on the media pins, the PHY transitions from the  
low-power state to the LP wake-up state periodically based on the programmable sleep  
timer (register bits 20E.14:13). The actual sleep time duration is randomized from  
–80 ms to +60 ms to avoid two linked PHYs in ActiPHY Mode entering a lock-up state  
during operation.  
Revision 4.1  
September 2009  
Page 24  
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