VITESSE
SEMICONDUCTOR CORPORATION
Advance Product Information
VSC8151
2.488Gb/s SONET/SDH
STS-48/STM-16 Section Terminator
If the user chooses to use the CDR as a timing source even during AIS mode, the output of the CDR can be
connected single ended to both RXSCLKIN and TXSCLKIN, or a multi-drop connection can be made differen-
tially.
Figure 4: VSC8151 using CDR as Transmit Timing Source
RXSIN+/-
2.488Gb/s Data
622Mb/s Data
155MB/s Data
SEF/LOF ALARMS
Received
Data
Clock and
Data Recovery
VSC8122
2.488GHz Clock
622MHz Clock
155MHz Clock
RXSCLKIN+/-
Demux &
Monitor
Logic
AIS State
Machine
AIS Insert
TXSCLKIN+/-
2.488GHz Clock
622MHz Clock
155MHz Clock
Modify
Logic
CMU
Reference
Generator
Mux &
Frame
Assembly
Logic
TXSOUT+/-
TXSCLKOUT+/-
AIS Reference
78 MHz
AIS Reference
155/78 MHz
SONET/SDH Monitoring Circuitry Overview
The monitoring circuitry provides SONET/SDH compliant framing and framing alarms, as well as detect-
ing B1 and B2 parity errors and transport overhead byte output.
Framing
The frame acquisition algorithm determines the in-frame/out-of-frame status of the receiver. Out-of-frame
is defined as a state where the frame boundaries of the received SONET/SDH signal are unknown, i.e. after sys-
tem reset or if for some reason the receiver looses synchronization, e.g. due to ‘bit slips’. In-frame is defined as
a state where the frame boundaries are known.
The receiver monitors the frame synchronization by checking for the presence of a portion of the A1/A2
framing pattern every 125uS. If one or more bit errors are detected in the expected A1/A2 framing pattern out-
put RXFRERR (active high) will be asserted (See Figure 5). If framing pattern errors are detected for four con-
secutive frames a Severely Errored Frame (SEF) alarm will be asserted on output RXSEF (active high) (R5-
223).
G52225-0, Rev. 2.9
12/1/99
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VITESSE
SEMICONDUCTOR CORPORATION
741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896
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