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VSC8151 参数 Datasheet PDF下载

VSC8151图片预览
型号: VSC8151
PDF下载: 下载PDF文件 查看货源
内容描述: 2.488Gb / s的SONET / SDH STS - 48 / STM- 16科终结者 [2.488Gb/s SONET/SDH STS-48/STM-16 Section Terminator]
分类和应用:
文件页数/大小: 30 页 / 473 K
品牌: VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
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VITESSE  
SEMICONDUCTOR CORPORATION  
Advance Product Information  
2.488Gb/s SONET/SDH  
STS-48/STM-16 Section Terminator  
VSC8151  
The serial demux can be bypassed and the 16-bit single-ended PECL bus RXPIN[15:0] can be used to input  
SONET/SDH data for applications where the data has already been deserialized by a previous device. This  
mode is selected by asserting the EQULOOP input (active high). Input setup and hold requirements are speci-  
fied with respect to the falling edge of POUTCLK; the user is responsible for meeting loop timing requirements  
between the VSC8151 and previous device. The user must still provide a line rate clock to the serial clock input  
RXSLKIN+/- to provide a high-speed output clock to the mux and the means to create the divide-by-16 POUT-  
CLK.  
2.5G Serial and Parallel Output Interfaces  
The high speed clock and data output driver consists of a differential pair designed to drive a 50transmis-  
sion line. The transmission line should be terminated with a 100resistor at the load between true and comple-  
ment outputs. No connection to a termination voltage is required. The output driver is source terminated to 50Ω  
on-chip, providing a snubbing of any reflections. If used single-ended, one way to terminate the output driver is  
differentially at the load with a 100resistor between true and complement outputs. See Figure 2A. Another  
option is to terminate the used output at the load with 50 ohm to V  
and the unused output with 50 ohm to  
TERM  
V
at the source. See Figure 2B.  
TERM  
In some applications, it may be desirable to turn off the high speed outputs (TXSOUT, TXSCLKOUT) to  
reduce power. To disable the high speed clock output, tie pin 22 to V (3.3V) instead of GND. To disable the  
CC  
high speed data output, tie pin 17 to V (3.3V) instead of GND. Turning off each output will reduce maximum  
CC  
current consumption by 107mA for the clock output, and 122mA for the data output.  
Figure 2: High Speed Output Driver & Termination  
VCC  
Figure 2A  
50Ω  
50Ω  
100Ω  
Z0 = 50Ω  
Pre-Driver  
Figure 2B  
VCC  
VTERM  
50Ω  
VEE  
50Ω  
50Ω  
Z0 = 50Ω  
50Ω  
Pre-Driver  
VTERM  
VEE  
G52225-0, Rev. 2.9  
12/1/99  
VITESSE SEMICONDUCTOR CORPORATION  
741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896  
Page 3  
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