VITESSE
SEMICONDUCTOR CORPORATION
Data Sheet
2.48832Gb/s 16:1 SONET/SDH
Transceiver with Integrated Clock Generator
VSC8140
Table 4: Package Pin Identification - 128 PQFP
Pin #
Name
I/O
Level
Description
Low-speed single-ended data
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
RXOUT14
VEE
O
—
O
O
—
O
O
—
—
O
O
O
O
—
I
LVPECL
GND typ. Negative power supply
RXOUT15
RXPARITYOUT
VCC
LVPECL
LVPECL
3.3V typ.
LVPECL
LVPECL
Low-speed single-ended data (MSB)(2)
Receiver parity bit output
Positive power supply
RXCLK16O-
RXCLK16O+
VEE
Parallel clock output (155.52MHz), complement
Parallel clock output (155.52MHz), true
GND typ. Negative power supply
VCC
3.3V typ.
LVPECL
LVPECL
LVPECL
LVPECL
3.3V typ.
TTL
Positive power supply
RXCLK16_32O-
RXCLK16_32O+
CLK128O-
CLK128O+
VCC
Divide-by-16 or -32 clock output, complement
Divide-by-16 or -32 clock output, true
Divide-by-128 clock output, complement
Divide-by-128 clock output, true
Positive power supply
RXCLKO_FREQSEL
LOS
RXCLKO16_32 frequency select
Loss of Signal control
I
TTL
POL
I
TTL
Polarity Signal Control
EQULOOP
VCC
I
TTL
Equipment loopback, active high
Positive power supply
—
O
3.3V typ.
TTL
PARERR
Parity error output
NOTES: (1) No connect (NC) pin must be left unconnected. Connecting this pin to either the positive or negative power supply
rails may cause improper operation or failure of the device; or in extreme cases, cause permanent damage to the device.
(2) There has been a change in the naming of the pins of the Low-Speed Parallel Receive and Transmit pins of the
VSC8140. RXOUT0; pin 88 (MSB) has been changed to RXOUT15; pin 111 (MSB) and TXIN15; pin 63 (LSB) has been
changed to TXIN0; pin 83 (LSB).
Page 22
VITESSE SEMICONDUCTOR CORPORATION
G52251-0, Rev. 4.0
741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896
9/6/00