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VSC8140TW 参数 Datasheet PDF下载

VSC8140TW图片预览
型号: VSC8140TW
PDF下载: 下载PDF文件 查看货源
内容描述: 2.48832Gb / s的16 : 1 SONET / SDH收发器,集成时钟发生器 [2.48832Gb/s 16:1 SONET/SDH Transceiver with Integrated Clock Generator]
分类和应用: 时钟发生器ATM集成电路SONET集成电路SDH集成电路电信集成电路电信电路异步传输模式
文件页数/大小: 34 页 / 530 K
品牌: VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
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VITESSE  
SEMICONDUCTOR CORPORATION  
Data Sheet  
2.48832Gb/s 16:1 SONET/SDH  
Transceiver with Integrated Clock Generator  
VSC8140  
Table 5: Package Pin Identification - 208 BGA  
Pin #  
Name  
I/O  
Level  
Description  
B3  
D4  
C3  
C1  
F4  
F3  
D1  
E1  
G4  
G3  
F2  
G2  
F1  
H3  
H2  
G1  
H1  
J2  
VCC  
VCC  
I
3.3V typ. Positive power supply  
3.3V typ. Positive power supply  
GND typ. Negative power supply  
VEE  
FACLOOP  
LOOPTIM0  
PARMODE  
FIFORESET  
LOOPTIM1  
REF_FREQSEL  
VEE  
TTL  
TTL  
TTL  
TTL  
TTL  
TTL  
Facility loopback, active high  
I
Enable internal looptiming operation, active high  
Parity mode select  
I
I
Reset to align FIFO write and read pointers  
Enable external loop timing operation, active high  
Reference clock input select  
I
I
I
GND typ. Negative power supply  
LPTIMCLK+  
LPTIMCLK-  
VCC_ANA  
VEE_ANA  
REFCLK+  
REFCLK-  
VEE  
LVPECL External loop timing clock, true  
LVPECL External loop timing clock, complement  
+3.3V typ. Positive power supplies for analog parts of CMU  
GND typ. Negative power supplies for analog parts of CMU  
LVPECL Reference clock input, true  
I
I
I
LVPECL Reference clock input,complement  
GND typ. Negative power supply  
VCC  
3.3V typ. Positive power supply  
J4  
FILTAO  
Loop filter pin - connect via capacitor to FILTAI (pin 53)  
Loop filter pin - connect via capacitor to FILTAIN (pin 54)  
Loop filter pin - connect via capacitor to FILTAO (pin 51)  
Loop filter pin - connect via capacitor to FILTAON (pin 52)  
J3  
FILTAON  
FILTAI  
K1  
K2  
K3  
FILTAIN  
VCC  
3.3V typ. Positive power supply  
Low-speed clock output, true. A divide-by-16 version of the PLL  
clock.  
K4  
L1  
TXCLK16O+  
TXCLK16O-  
O
O
LVPECL  
LVPECL  
Low-speed clock output, complement. A divide-by-16 version of the  
PLL clock.  
M1  
L2  
VEE  
TXCLK16I-  
TXCLK16I+  
VCC  
I
GND typ. Negative power supply  
LVPECL Low-speed clock input for latching low-speed data, complement  
LVPECL Low-speed clock input for latching low-speed data, true  
3.3V typ. Positive power supply  
L3  
I
L4  
I
M2  
M3  
M4  
P1  
TXPARITYIN  
TXIN15  
LVPECL Transmitter parity bit input  
LVPECL Low-speed single-ended data (MSB)(1)  
I
TXIN14  
I
LVPECL Low-speed single-ended data  
VEE  
GND typ. Negative power supply  
G52251-0, Rev. 4.0  
9/6/00  
VITESSE SEMICONDUCTOR CORPORATION  
741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896  
Page 25  
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