VITESSE
SEMICONDUCTOR CORPORATION
Data Sheet
2.48832Gb/s 16:1 SONET/SDH
Transceiver with Integrated Clock Generator
VSC8140
Table 4: Package Pin Identification - 128 PQFP
Pin #
Name
I/O
Level
Description
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
VEE
FACLOOP
LOOPTIM0
PARMODE
FIFORESET
LOOPTIM1
REF_FREQSEL
LPTIMCLK+
LPTIMCLK-
VCC_ANA
VEE_ANA
REFCLK+
REFCLK-
VEE
—
I
GND typ. Negative power supply
TTL
TTL
Facility loopback, active high
I
Enable internal looptiming operation, active high
Parity mode select
I
TTL
I
TTL
Reset to align FIFO write and read pointers
Enable external loop timing operation, active high
Reference clock input select
I
TTL
I
TTL
I
LVPECL
LVPECL
External loop timing clock, true
I
External loop timing clock, complement
—
—
I
+3.3V typ. Positive power supplys for analog parts of CMU
GND typ. Negative power supplys for analog parts of CMU
LVPECL
LVPECL
Reference clock input, true
I
Reference clock input, complement
—
—
—
—
—
—
GND typ. Negative power supply
FILTAO
—
—
Loop filter pin - connect via capacitor to FILTAI (pin 53)
Loop filter pin - connect via capacitor to FILTAIN (pin 54)
FILTAON
FILTAI
—
Loop filter pin - connect via capacitor to FILTAO (pin 51)
Loop filter pin - connect via capacitor to FILTAON (pin 52)
Positive power supply
FILTAIN
—
VCC
3.3V typ.
Low-speed clock output, true. A divide-by-16 version of the PLL
clock.
56
57
TXCLK16O+
TXCLK16O-
O
O
LVPECL
LVPECL
Low-speed clock output, complement. A divide-by-16 version of the
PLL clock.
58
59
60
61
62
63
64
65
66
67
68
69
70
71
VEE
TXCLK16I-
TXCLK16I+
VCC
—
I
GND typ. Negative power supply
LVPECL
LVPECL
3.3V typ.
LVPECL
LVPECL
LVPECL
Low-speed clock input for latching low-speed data, complement
I
Low-speed clock input for latching low-speed data, true
Positive power supply
—
I
TXPARITYIN
TXIN15
TXIN14
VEE
Transmitter parity bit input
Low-speed single-ended data (MSB)(2)
I
I
Low-speed single-ended data
—
—
I
GND typ. Negative power supply
VCC
3.3V typ.
LVPECL
LVPECL
LVPECL
LVPECL
LVPECL
Positive power supply
TXIN13
TXIN12
TXIN11
TXIN10
TXIN9
Low-speed single-ended data
Low-speed single-ended data
Low-speed single-ended data
Low-speed single-ended data
Low-speed single-ended data
I
I
I
I
Page 20
VITESSE SEMICONDUCTOR CORPORATION
741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896
G52251-0, Rev. 4.0
9/6/00