VITESSE
SEMICONDUCTOR CORPORATION
Preliminary Datasheet
VSC8109
Features
• Multiple Length PRBS Generator With
Adjustable Mark Ratios
• PRBS Error Detector and 16-bit Accumulator
• 155/622 Mb/s 16 bit ECL I/O Interface
155/622 Mhz 16 Channel PRBS
Generator and Comparator.
• STS-192/STM-64 Selectable Frame Insertion
• 16 Bit Static and Selectable Divider Output
• Bitwise External Data Bypass Mode
General Description
The VSC8109 incorporates a PRBS transmitter and receiver in order to construct 2.5 and 10 Gb/s test sys-
tems. The transmitter generates a 16 channel 155/622 Mbit/sec PRBS pattern and can be connected to a multi-
plexer to generate up to a 10 Gbit/sec serial bit pattern. The device outputs random sequence lengths from 2
7
-1
to 2
31
-1 with an adjustable mark ratio. The receiver includes a PRBS comparator and error detection circuitry
that detects any errors in the demultiplexed PRBS pattern allowing the user to calculate a bit error rate.
The transmitter and receiver can be used separately, allowing testing of a transmission system with
VSC8109 devices in different locations.
VSC8109 Functional Block Diagram (Transmitter)
TCK+/-
XDATA[15:0]
LEN_SEL[1:0]
PRBS_IN
16
TCKO622+/-
16
PRBS
16
16
00
16
01
10
0
1
FRGN
Static
Signal
Registers
Q[15:0]
WRD_SRC[7:0]
LD_WRD_U
LD_WRD_L
16
11
16
DIV
2
OUT_SEL[1:0]
LD_SRC_U
LD_SRC_L
Bypass
Control
Registers
16
G52207-0, Rev. 3.0
4/3/98
©
VITESSE
SEMICONDUCTOR CORPORATION
741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896
Page 1
VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
