VITESSE
SEMICONDUCTOR CORPORATION
Datasheet
2.488 Gb/s ATM/SDH/SONET STM-16/STS-48
Mux/Demux and Section Terminator IC Chipset
VSC8025/VSC8026
The V pin(s) will be isolated from and connect to the main +3.3V plane through a 10µH C-L-C filter.
DD
Each board is different. The frequencies of the noise differs, so in the end one should lay the board out with as
many extra lands for extra decoupling capacitors, as well as, accommodating either a ferrite bead or an inductor.
During the prototype evaluation phase, a spectrum analyzer is used to determine if the noise has been filtered to
acceptable levels.
Figure 21: Loopback Functional Block Diagram
To Optics Module
VSC8025
VSC8026
0
1
TXSOUT
RXSIN
D
Q
0
1
8:1
MUX
8:1
DMUX
RXSCLKIN
RXSLBOUT
0
1
TXSCLKOUT
TXSLBIN
Q
D
Q
D
TXSLBCLK
RXSLBCLK
RXPIN[7:0]
TXPOUT[7:0]
D
D
Q
Q
D
D
Q
Q
0
1
TXPCLKOUT
TXFPOUT
RXPCLKIN
RXFPIN
FACLOOP
EQULOOP
FACLOOP
Note: All signals are drawn as single ended
G52182-0, Rev. 4.0
1/5/00
VITESSE SEMICONDUCTOR CORPORATION
741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896
Page 39
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