VSC6134
Datasheet
4.2
AC Characteristics
This section contains the AC specifications for the VSC6134 device.
4.2.1
Data Input for LVDS Receive
The following diagram and table provide the timing information for the data input for the LVDS receive.
Figure 78. Timing Diagram for LVDS Receive
TDRP
TDRW
RXCLK_P
TDRH
RXDATA(_P, _N)
.......
RXDATA(_P, _N)
TDRS
Table 434. LVDS Receive
Symbol
TDRP
TDRW
TDRR
TDRF
Parameter
Minimum
Typical
Maximum
Unit
Clock period
1 / 669.33 MHz
ns
Duty cycle
0.47
100
100
270
270
0.5
200
200
0.53
300
300
20% to 80% rise time
20% to 80% fall time
Data setup time
Data hold time
ps
ps
ps
ps
TDRS
TDRH
4.2.2
Data Output for LVDS Transmit
The following diagram and table provide the timing information for the data output for the LVDS
transmit.
Figure 79. Timing Diagram for LVDS Transmit
TDTP
TDTW
TXCLK_P
TXDATA(_P, _N)
.......
TXDATA(_P, _N)
TDTCQ
391 of 438
VMDS-10185 Revision 4.0
July 2006
VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
