VSC6134
Datasheet
2.15.14 Client and Line Interface Card Loopback Modes
There are two Client and Line Interface Card Loopback modes:
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Client LIC Test Interface Loopback with Clock Management
Line LIC Test Interface Loopback with Clock Management
The following figure shows the Line 2 Interface Card Loopback modes. This mode is provided to test
the board-level clock and data interfaces. Data is directly looped from the Rx interface, through the
16-to-64 bit demux, back through the 64-to-16 bit mux, and out the Tx interface. The Rx clock is also
looped back and sent out as the Tx clock.
Figure 48. LIC Test Line and Client Interface Loopback Modes
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VMDS-10185 Revision 4.0
July 2006
VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
