VITESSE
SEMICONDUCTOR CORPORATION
2.488 Gbit/sec to 2.7Gbit/sec
1:16 SONET/SDH Demux
Preliminary Datasheet
VSC8164
Figure 1: Split-end DC Termination of Low Speed LVPECL CLK16O, CLK32O, D[15:0] Outputs
VCC
VSC8164
R1
Z
o
R1
downstream
Z
o
R1||R2 = Z
o
, R1 = 125
Ω
R2 = 83
Ω
R2
VEE
R2
V
CC
R2 + V
EE
R1
R1+R2
= V
Term
Figure 2: Traditional DC Termination of Low Speed LVPECL CLK16O, CLK32O, D[15:0] Outputs
VSC8164
downstream
Z
o
R1 =50
Ω
V
CC
-2V
R1 =50
Ω
V
CC
-2V
Figure 3: AC Termination of Low Speed LVPECL CLK16O, CLK32O, D[15:0] Outputs
VSC8164
Z
o
Z
o
50
Ω
50
Ω
100nF
downstream
bias point
generated
internally
100nF
V
CC
-2V
Page 2
VITESSE
SEMICONDUCTOR CORPORATION
741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896
G52239-0, Rev. 3.3
5/17/00
VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
