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TCD6001 参数 Datasheet PDF下载

TCD6001图片预览
型号: TCD6001
PDF下载: 下载PDF文件 查看货源
内容描述: 6通道类-T数字音频处理器采用数字电源PROCESSINGTM技术 [6 CHANNEL CLASS-T DIGITAL AUDIO PROCESSOR USING DIGITAL POWER PROCESSINGTM TECHNOLOGY]
分类和应用:
文件页数/大小: 43 页 / 411 K
品牌: TRIPATH [ TRIPATH TECHNOLOGY INC. ]
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Tripath Technology, Inc. – Preliminary Technical Information  
Automatic DC Offset Calibration Control  
Addr  
2Fh  
Register Name  
Automatic DC Calibration Control  
Default  
D7  
0
D6  
CAB  
0
D5  
CFH2  
0
D4  
CFH1  
0
D3  
CF4  
0
D2  
CF3  
0
D1  
CF2  
0
D0  
CF1  
0
0
The CFn bits control which DC offset calibration values will be used. If a particular channel’s CFn bit is set to  
‘1’, the value stored in the Calibration Bank registers will be used. If CFn is cleared to ‘0’, the Automatic DC  
Offset Calibration values that were calculated after coming out of hard mute will be used.  
Setting the CAB bit to ‘1’ will bypass Automatic DC Offset Calibration. DCX works in conjunction with the  
CAB bit. DCX should be set to the same value as CAB.  
For normal operation, CFH1 and CFH2 should be set to ‘1’.  
Calibration Bank  
Addr  
30h  
31h  
32h  
33h  
34h  
35h  
36h  
37h  
Register Name  
Calibration Bank  
Calibration Bank  
Calibration Bank  
Calibration Bank  
Calibration Bank  
Calibration Bank  
Calibration Bank  
Calibration Bank  
Default  
D7  
CB19  
CB29  
CB39  
0
D6  
CB18  
CB28  
CB38  
0
D5  
D4  
D3  
D2  
D1  
D0  
CB17  
CB27  
CB37  
CB31  
CB47  
CH17  
CH27  
CH21  
0
CB16  
CB26  
CB36  
CB30  
CB46  
CH16  
CH26  
CH20  
0
CB15  
CB25  
CB35  
CB21  
CB45  
CH15  
CH25  
CH11  
0
CB14  
CB24  
CB34  
CB20  
CB44  
CH14  
CH24  
CH10  
0
CB13  
CB23  
CB33  
CB11  
CB43  
CH13  
CH23  
CB41  
0
CR12  
CR22  
CR32  
CR10  
CR42  
CH12  
CH22  
CR40  
0
CB49  
CH19  
CH29  
0
CB48  
CH18  
CH28  
0
0
0
These registers store calibration values that can be forced instead of the automatic DC calibration values.  
Register 2Fh controls whether the automatic values will be used or the Calibration Bank values. The DC  
calibration values are 10 bit words so they are stored in separate bytes. For example, for channel 1, the 8  
most significant bits are stored in register 30h, while the 2 least significant bits are stored in register 05h –  
bits D1 and D0.  
For normal operation, all CH1n and CH2n bits should be cleared to ‘0’.  
Force DC  
Addr  
38h  
Register Name  
Force DC  
D7  
FD7  
0
D6  
FD6  
0
D5  
FD5  
0
D4  
FD4  
1
D3  
FD3  
1
D2  
FD2  
1
D1  
FD1  
0
D0  
FD0  
0
Default  
This register is used to force a DC offset in the system. It is used for testing purposes. It should be changed  
from its default setting to 00h for normal operation.  
29  
TCD6001 – JL/Rev. 0.9/07.05  
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