TMC8462 Datasheet • Document Revision V1.4 • 2018-May -09
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6.4.6 PDI
6.4.6.1 PDI Control (0x0140)
Bit
Description
ECAT
PDI
Reset Value
7:0
Process data interface:
r/-
r/-
TMC8460, TMC8461,
TMC8462, TMC8670: 0x00
0x00: Interface deactivated (no PDI)
. . .
later EEPROM ADR 0x0000
0x05: SPI Slave
. . .
0x80: On-chip bus
only SPI Slave (0x05) is
supported in the hardware
Others: Reserved
Table 34: Register 0x0140 (PDI Control)
6.4.6.2 ESC Configuration (0x0141)
Bit
Description
ECAT
PDI
Reset Value
0
Device emulation (control of AL status):
0: AL status register has to be set by PDI
1: AL status register will be set to value written
to AL control register
r/w
r/-
1
Enhanced Link detection all ports:
0: disabled (if bits [7:4]=0)
1: enabled at all ports (overrides bits [7:4])
r/-
r/-
2
3
4
5
6
7
Distributed Clocks SYNC Out Unit:
r/-
r/-
r/-
r/-
r/-
r/-
r/-
r/-
r/-
r/-
r/-
r/-
0: disabled (power saving) / 1: enabled
Distributed Clocks Latch In Unit:
0: disabled (power saving) / 1: enabled
Enhanced Link port 0:
0: disabled (if bit 1=0) / 1: enabled
Enhanced Link port 1:
0: disabled (if bit 1=0) / 1: enabled
Enhanced Link port 2:
0: disabled (if bit 1=0) / 1: enabled
Enhanced Link port 3:
0: disabled (if bit 1=0) / 1: enabled
Table 35: Register 0x0141 (ESC Config)
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