TMC8462 Datasheet • Document Revision V1.4 • 2018-May -09
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Bit
Description
ECAT
PDI
Reset Value
5:4
SYNC1 output driver/polarity:
00: Push-Pull active low
r/-
r/-
TMC8461: 10
TMC8462: 10
01: Open Drain (active low)
10: Push-Pull active high
11: Open Source (active high)
6
7
SYNC1/LATCH1 configuration*:
0: LATCH1 input
r/-
r/-
r/-
TMC8461: 1
TMC8462: 1
1: SYNC1 output
SYNC1 mapped to AL Event Request register r/-
TMC8461, TMC8462: de-
pends on configuration
0x0220.3:
0: Disabled
1: Enabled
Table 38: Register 0x0151 (SYNC/LATCH CFG)
6.4.6.6 PDI SPI Slave Extended Configuration (0x0152:0x0153)
Bit
Description
ECAT
PDI
Reset Value
15:0
Reserved, set EEPROM value 0
r/-
r/-
TMC8461: 0
TMC8462: 0
Table 39: Register 0x0152:0x0153 (PDI SPI extCFG)
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